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AMIS-30624_13 Datasheet, PDF (40/52 Pages) ON Semiconductor – I2C Micro-stepping Motor Driver | |||
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AMISâ30624, NCV70624
Clock Generation
The master generates the clock on the SCK line to transfer
messages on the I2Câbus. Data is only valid during the
HIGH period of the clock.
Data Formats with 7âbit Addresses
Data transfers follow the format shown in Figure 27. After
the START condition (S), a slave address is sent. This
START
SDA
address is 7âbit long followed by an eighth bit which is a data
direction bit (R/W) â a âzeroâ indicates a transmission
(WRITE), a âoneâ indicates a request for data (READ). A
data transfer is always terminated by a STOP condition (P)
generated by the master.
STOP
SCK
1â7
8
9
1â7
8
9
1â7
8
9
START
condition ADDRESS
R/W
ACK
DATA
ACK
Figure 27. A Complete Data Transfer
DATA
STOP
ACK
condition
However, if a master still wishes to communicate on the
bus, it can generate a repeated START (Sr) and address
another slave without first generating a STOP condition.
Various combinations of read/write formats are then
possible within such a transfer.
Data Transfer Formats
Writing Data to AMISâ30624/NCV70624
When writing to AMISâ30624/NCV70624, the
masterâtransmitter transmits to slaveâreceiver and the
transfer direction is not changed. A complete transmission
consists of:
ï¨ Start condition
ï¨ The slave address (7âbit)
ï¨ Read/Write bit (â0â = write)
ï¨ Acknowledge bit
ï¨ Any further data bytes are followed by an
acknowledge bit. The acknowledge bit is used to
signal a correct reception of the data to the
transmitter. In this case the
AMISâ30624/NCV70624 pulls the SDA line to â0â.
The AMISâ30624/NCV70624 reads the incoming
data at SDA on every rising edge of the SCK signal
ï¨ Stop condition to finish the transmission
S Slave Address R/W A
Data
A
Data
AP
â0â = WRITE
N bytes + Acknowledge
Master to AMISâ30624
AMISâ30624 to Master
S = Start condition
P = Stop condition
A = Acknowledge (SDA = LOW)
A = No Acknowledge (SDA = HIGH)
Figure 28. Master Writing Data to AMISâ30624/NCV70624
Some commands for the AMISâ30624/NCV70624 are
supporting eight bytes of data, other commands are
transmitting two bytes of data. See Table 31.
Reading Data to AMISâ30624/NCV70624
When reading data from AMISâ30624/NCV70624 two
transmissions are needed:
1. The first transmission consists of two bytes of
data:
ï¨ The first byte contains the slave address and the
write bit.
ï¨ The second byte contains the address of an
internal register in the
AMISâ30624/NCV70624. This internal
register address is stored in the circuit RAM.
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