LC88F5LA4ACS Datasheet, PDF (32/33 Pages) Sanyo Semicon Device – FROM 96K byte, RAM 6K byte on-chip 16-bit 1-chip Microcontroller

RES
tSCKHBSY
RUN:
SIOCLK:
LC88F5LA4ACS
VDD
RRES
CRES
Note:
Reset signal must be present when power
supply rises.
Determine the value of CRES and RRES so
that the reset signal is present for 10μs after the
supply voltage gets stabilized.
Figure 5 Reset Circuit
tSCKHBSY
DATAIN:
DI0
DI1
DI6
DI7
DI8
DIx
DATAOUT:
DO0
DO1
DO6
DO7
DO8
Data RAM transfer period
(SIO0 and SIO1 only)
DOx
SIOCLK:
DATAIN:
DATAOUT:
tSCK
tSCKL
tsDI
tSCKH
thDI
tdDO
Data RAM transfer period
(SIO0 and SIO1 only)
SIOCLK:
DATAIN:
DATAOUT:
tSCKL
tsDI
tdDO
tSCKHA
thDI
* Remarks: DIx and DOx denote the last bits communicated; x = 0 to 32768
Figure 6 Serial I/O Waveforms
tPIL
tPIH
Figure 7 Pulse Input Timing Signal Waveform
No.A1860-32/33