PACVGA201 Datasheet, PDF (3/8 Pages) California Micro Devices Corp – VGA PORT COMPANION CIRCUIT

PACVGA201
Ordering Information
PART NUMBERING INFORMATION
Pins
16
Package
QSOP
Ordering Part Number¹
PACVGA201QR
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Part Marking
PACVGA 201QR
PIN DESCRIPTIONS
Pins(s)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
V_CC3
DESCRIPTION
V_CC3 supply pin. This is an isolated supply input for the two sync buffers and SD1 and SD2
ESD protection circuits.
V_CC1
VIDEO_1
V_CC1 supply pin. This is an isolated supply pin for the VIDEO_1, VIDEO_2 and VIDEO_3 ESD
protection circuits.
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the VGA controller device and the video connector.
VIDEO_2
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the VGA controller device and the video connector.
VIDEO_3
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the VGA controller device and the video connector.
GND
Ground reference supply pin.
PWR_UP
Enables the sync buffers when high. When PWR_UP is low the sync outputs are forced low
and the inputs can be floated.
V
CC2
DDC_OUT1
V supply pin. This is an isolated supply pin for the DDC_OUT1 and DDC_OUT2 ESD
CC2
protection circuits. Internally, V_CC2 is derived from the V_CC3 input if the V_CC2 input is not
connected to a supply voltage.
DDC_OUT1 ESD protection channel.
DDC_OUT2 DDC_OUT2 ESD protection channel
SYNC_IN1 Sync signal buffer input. Connects to the VGA Controller side of one of the sync lines.
SYNC_OUT1 Sync signal buffer output. Connects to the video connector side of one of the sync lines.
SYNC_IN2
SYNC_OUT2
Sync signal buffer input. Connects to the VGA Controller side of one of the sync lines.
Sync signal buffer output. Connects to the video connector side of one of the sync lines.
SD1
ESD protection channel input.
SD2
ESD protection channel input.
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