CAT5419WI-25 Datasheet, PDF (3/16 Pages) ON Semiconductor – Dual Digitally Programmable Potentiometers with 64 Taps and 2-wire Interface

CAT5419
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Parameters
Temperature Under Bias
Storage Temperature Range
Voltage to any Pins with Respect to V_SS ^{(2) (3)}
V_CC with Respect to GND
Package Power Dissipation Capability (T_A = 25°C)
Lead Soldering Temperature (10 secs)
Wiper Current
Ratings
-55 to +125
-65 to +150
-2.0 to V_CC +2.0
-2.0 to +7.0
1.0
300
±12
Units
ºC
ºC
V
V
W
ºC
mA
RECOMMENDED OPERATING CONDITIONS
Parameters
V_CC
Industrial Temperature
Ratings
+2.5 to 6.0
-40 to +85
Units
V
ºC
POTENTIOMETER CHARACTERISTICS
Over recommended operating conditions unless otherwise stated.
Symbol Parameter
Test Conditions
Min
Typ Max Units
R_POT
R_POT
R_POT
R_POT
Potentiometer Resistance (-00)
Potentiometer Resistance (-50)
Potentiometer Resistance (-10)
Potentiometer Resistance (-2.5)
Potentiometer Resistance Tolerance
100
kΩ
50
kΩ
10
kΩ
2.5
kΩ
±20
%
R_POT Matching
Power Rating
25°C, each pot
1
%
50
mW
I_W
R_W
R_W
V_TERM
V_N
TC_RPOT
TC_RATIO
C_H/C_L/C_W
fc
Wiper Current
Wiper Resistance
Wiper Resistance
Voltage on any R_H or R_L Pin
Noise
Resolution
Absolute Linearity ⁽⁵⁾
Relative Linearity ⁽⁶⁾
Temperature Coefficient of R_POT
Ratiometric Temp. Coefficient
Potentiometer Capacitances
Frequency Response
I_W = ±3mA @ V_CC = 3V
I_W = ±3mA @ V_CC = 5V
V_SS = 0V
(4)
R_W(n)(actual)-R_{(n)(expected)(8)}
R_W(n+1)-[R_W(n)+LSB]⁽⁸⁾
(4)
(4)
(4)
R_POT = 50kΩ⁽⁴⁾
GND
80
TBD
1.6
±300
10/10/25
0.4
±6
300
150
V_CC
±1
±0.2
20
mA
Ω
Ω
V
nV/√Hz
%
LSB ⁽⁷⁾
LSB ⁽⁷⁾
ppm/°C
ppm/°C
pF
MHz
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is V_CC +0.5V, which may overshoot to V_CC +2.0V for periods of less than 20 ns.
(3) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to V_CC +1V.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
(5) Absolute linearity is utilitzed to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer.
(6) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a
potentiometer. It is a measure of the error in step size.
(7) LSB = R_TOT / 63 or (R_H - R_L) / 63, single pot
(8) n = 0, 1, 2, ..., 63
2008 SCILLC. All rights reserved.
3
Characteristics subject to change without notice
Doc. No. MD-2115 Rev. I