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CAT5419WI-25 Datasheet, PDF (1/16 Pages) ON Semiconductor – Dual Digitally Programmable Potentiometers with 64 Taps and 2-wire Interface | |||
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CAT5419
Dual Digitally Programmable Potentiometers (DPPâ¢)
with 64 Taps and 2-wire Interface
FEATURES
 Two linear-taper digital potentiometers
 64 resistor taps per potentiometer
 End to end resistance 2.5kâ¦, 10kâ¦, 50k⦠or
100kâ¦
 Potentiometer control and memory access via
2-wire Interface (I2C like)
 Low wiper resistance, typically 80
 Four non-volatile wiper settings for each
potentiometer
 Recall of wiper settings at power up
 2.5 to 6.0 volt operation
 Standby current less than 1µA
 1,000,000 nonvolatile WRITE cycles
 100 year nonvolatile memory data retention
 24-lead SOIC and 24-lead TSSOP
 Write protection for data register
DESCRIPTION
The CAT5419 is two Digitally Programmable
Potentiometers (DPPâ¢) integrated with control logic
and 16 bytes of NVRAM memory.
A separate 6-bit control register (WCR) independently
controls the wiper tap position for each DPP.
Associated with each wiper control register are four 6-
bit non-volatile memory data registers (DR) used for
storing up to four wiper settings. Writing to the wiper
control register or any of the non-volatile data regis-
ters is via a 2-wire serial bus (I2C-like). On power-up,
the contents of the first data register (DR0) for each of
the two potentiometers is automatically loaded into its
respective wiper control registers (WCR).
The Write Protection (¯W¯P¯) pin protects against
inadvertent programming of the data register.
The CAT5419 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications.
PIN CONFIGURATION
SOIC (W)
(top view)
VCC 1
24 NC
RL0 2
23 NC
RH0 3
22 NC
RW0 4
21 NC
A2 5
20 A0
¯W¯P¯ 6 CAT 19 NC
SDA 7 5419 18 A3
A1 8
17 SCL
RL1 9
16 NC
RH1 10
15 NC
RW1 11
14 NC
GND 12
13 NC
TSSOP (Y)
(top view)
SDA 1
24 ¯W¯P¯
A1 2
23 A2
RL1 3
22 RW0
RH1 4
21 RH0
RW1 5
20 RL0
GND 6 CAT 19 VCC
NC 7 5419 18 NC
NC 8
17 NC
NC 9
16 NC
NC 10
15 NC
SCL 11
14 A0
A3 12
13 NC
For Ordering Information details, see page 15.
FUNCTIONAL DIAGRAM
RH0 RH1
SCL
SDA
WP
A0
A1
A2
A3
2-WIRE BUS
INTERFACE
WIPER
CONTROL
REGISTERS
RW0
CONTROL
LOGIC
NONVOLATILE
DATA
REGISTERS
RW1
RL0 RL1
2008 SCILLC. All rights reserved.
1
Characteristics subject to change without notice
Doc. No. MD-2115 Rev. I
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