CAT5269_13 Datasheet, PDF (3/15 Pages) ON Semiconductor – Dual Digital Potentiometer (POT)

CAT5269
PIN DESCRIPTIONS
Table 1. PIN DESCRIPTIONS
Pin # Name
Function
1
NC
No Connect
2
A0
Device Address, LSB
3
NC
No Connect
4
NC
No Connect
5
NC
No Connect
6
NC
No Connect
7
V_CC
Supply Voltage
8
R_L0
Low Reference Terminal for
Potentiometer 0
9
R_H0
High Reference Terminal for
Potentiometer 0
10
R_W0
Wiper Terminal for Potentiometer 0
11
A2
Device Address
12
WP
Write Protection
13
SDA
Serial Data Input/Output
14
A1
Device Address
15
R_L1
Low Reference Terminal for
Potentiometer 1
16
R_H1
High Reference Terminal for
Potentiometer 1
17
R_W1
Wiper Terminal for Potentiometer 1
18
GND Ground
19
NC
No Connect
20
NC
No Connect
21
NC
No Connect
22
NC
No Connect
23
SCL
Bus Serial Clock
24
A3
Device Address
SCL: Serial Clock
The CAT5269 serial clock input pin is used to clock all data
transfers into or out of the device.
SDA: Serial Data
The CAT5269 bidirectional serial data pin is used to transfer
data into and out of the device. The SDA pin is an open drain
output and can be wire-Ored with the other open drain or
open collector I/Os.
A0, A1, A2, A3: Device Address Inputs
These inputs set the device address when addressing
multiple devices. A total of sixteen devices can be addressed
on a single bus. A match in the slave address must be made
with the address input in order to initiate communication
with the CAT5269.
R_H, R_L: Resistor End Points
The two sets of R_H and R_L pins are equivalent to the terminal
connections on a mechanical potentiometer.
R_W: Wiper
The R_W pins are equivalent to the wiper terminal of a
mechanical potentiometer.
WP: Write Protect Input
The WP pin when tied low prevents non-volatile writes to
the data register (change of wiper control register is allowed)
and when tied high or left floating normal read/write
operations are allowed. See Write Protection on page 8 for
more details.
DEVICE OPERATION
The CAT5269 is two resistor arrays integrated with a
2-wire serial interface, two 8-bit wiper control registers and
eight 8-bit, non-volatile memory data registers. Each
resistor array contains 255 separate resistive elements
connected in series. The physical ends of each array are
equivalent to the fixed terminals of a mechanical
potentiometer (R_H and R_L). The tap positions between and
at the ends of the series resistors are connected to the output
wiper terminals (R_W) by a CMOS transistor switch. Only
one tap point for each potentiometer is connected to its wiper
terminal at a time and is determined by the value of the wiper
control register. Data can be read or written to the wiper
control registers or the non-volatile memory data registers
via the 2-wire bus. Additional instructions allow data to be
transferred between the wiper control registers and each
respective potentiometer’s non-volatile data registers. Also,
the device can be instructed to operate in an “increment/
decrement” mode.
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