CAT5269_13 Datasheet, PDF (11/15 Pages) ON Semiconductor – Dual Digital Potentiometer (POT)

CAT5269
These instructions are:
 XFR Data Register to Wiper Control Register −
This transfers the contents of one specified Data
Register to the associated Wiper Control Register.
 XFR Wiper Control Register to Data Register −
This transfers the contents of the specified Wiper
Control Register to the specified associated Data
Register.
 Gang XFR Data Register to Wiper Control
Register − This transfers the contents of all specified
Data Registers to the associated Wiper Control
Registers.
 Gang XFR Wiper Counter Register to Data
Register − This transfers the contents of all Wiper
Control Registers to the specified associated Data
Registers.
Increment/Decrement Command
The final command is Increment/Decrement (Figures 12
and 13). The Increment/Decrement command is different
from the other commands. Once the command is issued and
the CAT5269 has responded with an acknowledge, the
master can clock the selected wiper up and/or down in one
segment steps; thereby providing a fine tuning capability to
the host. For each SCL clock pulse (t_HIGH) while SDA is
HIGH, the selected wiper will move one resistor segment
towards the R_H terminal. Similarly, for each SCL clock
pulse while SDA is LOW, the selected wiper will move one
resistor segment towards the R_L terminal.
See Instructions format for more detail.
SDA
010 1
S ^{ID3 ID2 ID1 ID0} A3 A2 A1 A0
T
A
C
I3
I2
I1
I0
R1 R0 P1 P0
A
C
S
T
A
R Device ID
T
Internal
Address
K
KO
Instruction _{Register Pot/WCR P}
Opcode
Address Address
Figure 10. Two-byte Instruction Sequence
SDA
0 101
S
T
ID3
ID2 ID1 ID0 A3
A
R
Device ID
A2 A1 A0
Internal
A
C
K
T
Address
I3 I2 I1 I0 R1 R0 P1 P0 A
C
K
Instruction
Opcode
Data Pot/WCR
Register Address
Address
D7 D6 D5 D4 D3 D2 D1 D0
WCR[7:0]
or
Data Register D[7:0]
AS
CT
KO
P
Figure 11. Three-byte Instruction Sequence
SDA
0101
S ^{ID3 ID2 ID1 ID0 A3 A2 A1 A0} A ^{I3 I2 I1 I0 R1 R0 P1 P0} A I I
T
A Device ID
R
T
Internal
Address
C
CN N
K ^Instruction
Data ^{Pot/WCR K C C}
Opcode
Register ^Address
12
Address
Figure 12. Increment/Decrement Instruction Sequence
INC/DEC
Command
Issued
SCL
t_WRL
ID
N
C
E
C
n1
DS
ET
CO
nP
SDA
R_W
Voltage Out
Figure 13. Increment/Decrement Timing Limits
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