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CAT5221_13 Datasheet, PDF (3/15 Pages) ON Semiconductor – Dual Digital Potentiometer (POT)
CAT5221
Table 1. PIN DESCRIPTION
Pin (SOIC)
Name
1
RW0
2
RL0
3
RH0
4
A0
5
A2
6
RW1
7
RL1
8
RH1
9
SDA
10
GND
11
NC
12
NC
13
NC
14
SCL
15
A3
16
A1
17
NC
18
NC
19
NC
20
VCC
Function
Wiper Terminal for Potentiometer 0
Low Reference Terminal for Potentiometer 0
High Reference Terminal for Potentiometer 0
Device Address, LSB
Device Address
Wiper Terminal for Potentiometer 1
Low Reference Terminal for Potentiometer 1
High Reference Terminal for Potentiometer 1
Serial Data Input/Output
Ground
No Connect
No Connect
No Connect
Bus Serial Clock
Device Address
Device Address
No Connect
No Connect
No Connect
Supply Voltage
PIN DESCRIPTION
SCL: Serial Clock
The CAT5221 serial clock input pin is used to clock all
data transfers into or out of the device.
SDA: Serial Data
The CAT5221 bidirectional serial data pin is used to
transfer data into and out of the device. The SDA pin is an
open drain output and can be wire-Or’d with the other open
drain or open collector outputs.
A0, A1, A2, A3: Device Address Inputs
These inputs set the device address when addressing
multiple devices. A total of sixteen devices can be addressed
on a single bus. A match in the slave address must be made
with the address input in order to initiate communication
with the CAT5221.
RH, RL: Resistor End Points
The two sets of RH and RL pins are equivalent to the
terminal connections on a mechanical potentiometer.
RW: Wiper
The two RW pins are equivalent to the wiper terminal of
a mechanical potentiometer.
DEVICE OPERATION
The CAT5221 is two resistor arrays integrated with I2C
serial interface logic, two 6-bit wiper control registers and
eight 6-bit, non-volatile memory data registers. Each
resistor array contains 63 separate resistive elements
connected in series. The physical ends of each array are
equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL). RH and RL are symmetrical and
may be interchanged. The tap positions between and at the
ends of the series resistors are connected to the output wiper
terminals (RW) by a CMOS transistor switch. Only one tap
point for each potentiometer is connected to its wiper
terminal at a time and is determined by the value of the wiper
control register. Data can be read or written to the wiper
control registers or the non-volatile memory data registers
via the I2C bus. Additional instructions allow data to be
transferred between the wiper control registers and each
respective potentiometer’s non-volatile data registers. Also,
the device can be instructed to operate in an “increment/
decrement” mode.
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