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N01S818HA Datasheet, PDF (2/12 Pages) ON Semiconductor – 1 Mb Ultra-Low Power Serial SRAM
Table 2. PIN NAMES
Pin Name
CS
SCK
SI / SIO0
SO / SIO1
SC / SIO2
HOLD / SIO3
VCC
VSS
N01S818HA
Pin Function
Chip Select
Serial Clock
Data Input − SPI mode
Data Input/Output 0 − DUAL and QUAD mode
Data Output − SPI mode
Data Input/Output 1 − DUAL and QUAD mode
No Connect − SPI and DUAL mode
Data Input/Output 2 − QUAD mode
HOLD Input − SPI and DUAL mode
Data Input/Output 3 − QUAD mode
Power
Ground
SCK
CS
SI / SIO0
SO / SIO1
SIO2
HOLD / SIO3
Interface
Circuitry
Decode
Logic
Control
Logic
Data Flow
Circuitry
SRAM
Array
Figure 1. Functional Block Diagram
Table 3. CONTROL SIGNAL DESCRIPTIONS
Signal
Mode
Used
Name
Description
CS
All
Chip Select A low level selects the device and a high level puts the device in standby mode. If CS is brought
high during a program cycle, the cycle will complete and then the device will enter standby mode.
When CS is high, SO is in high-Z. CS must be driven low after power-up prior to any sequence
being started.
SCK
All
Serial Clock Synchronizes all activities between the memory and controller. All incoming addresses, data and
instructions are latched on the rising edge of SCK. Data out is updated after the falling edge of
SCK.
SI
SPI Serial Data In Receives instructions, addresses and data on the rising edge of SCK.
SO
SPI Serial Data Out Data is transferred out after the falling edge of SCK.
HOLD SPI and
DUAL
Hold
A high level is required for normal operation. Once the device is selected and a serial sequence
is started, this input may be taken low to pause serial communication without resetting the serial
sequence. The pin must be brought low while SCK is low for immediate use. If SCK is not low,
the HOLD function will not be invoked until the next SCK high to low transition. The device must
remain selected during this sequence. SO is high-Z during the Hold time and SI and SCK are
inputs are ignored. To resume operations, HOLD must be pulled high while the SCK pin is low.
Lowering the HOLD input at any time will take to SO output to High-Z.
SIO0 - 1 DUAL
Serial Data
Input / Output
Receives instructions, addresses and data on the rising edge of SCK. Data is transferred out
after the falling edge of SCK. The instruction must be set after power-up to enable the DUAL
access mode.
SIO0 - 3 QUAD
Serial Data
Input / Output
Receives instructions, addresses and data on the rising edge of SCK. Data is transferred out
after the falling edge of SCK. The instruction must be set after power-up to enable the QUAD
access mode.
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