MC10E116_16 Datasheet, PDF (2/8 Pages) ON Semiconductor – 5V ECL Quint Differential Line Receiver

MC10E116, MC100E116
D₃
D₂
D₂
V_EE
V_BB
D₀
D₀
D₃
25
26
27
28
1
2
3
4
5
D₄ D₄ V_CCO Q₄ Q₄ V_CCO
24 23 22 21 20 19
18
17
16
Pinout: 28-Lead PLCC
15
(Top View)
14
13
12
6 7 8 9 10 11
Q₃
Q₃
V_CC
Q₂
Q₂
V_CCO
Q₁
D₁ D₁ V_CCO Q₀ Q₀ V_CCO Q₁
* All V_CC and V_CCO pins are tied together on the die.
Warning: All V_CC, V_CCO, and V_EE pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 1. Pinout Assignment
D₀
Q₀
D₀
Q₀
D₁
Q₁
D₁
Q₁
D₂
Q₂
D₂
Q₂
D₃
Q₃
D₃
Q₃
D₄
Q₄
D₄
Q₄
V_BB
Figure 2. Logic Diagram
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D₀, D₀ − D₄, D₄
Q₀, Q₀ − Q₄, Q₄
V_BB
V_CC, V_CCO
V_EE
ECL Differential Input Pairs
ECL Differential Output Pairs
Reference Voltage Output.
Positive Supply
Negative Supply
Table 2. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
V_CC PECL Mode Power Supply
V_EE NECL Mode Power Supply
V_I
PECL Mode Input Voltage
NECL Mode Input Voltage
I_out Output Current
V_EE = 0 V
V_CC = 0 V
V_EE = 0 V
V_CC = 0 V
Continuous
Surge
V_I ≤ V_CC
V_I ≥ V_EE
8
V
−6
V
6
V
−6
50
mA
100
I_BB V_BB Sink/Source
T_A
Operating Temperature Range
T_stg Storage Temperature Range
q_JA Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
PLCC−28
PLCC−28
±0.5
0 to +85
−65 to +150
63.5
43.5
mA
°C
°C
°C/W
q_JC Thermal Resistance (Junction-to-Case)
T_sol Wave Solder (Pb-Free)
Standard Board
PLCC−28
22 to 26
265
°C/W
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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