English
Language : 

CM2009 Datasheet, PDF (2/6 Pages) California Micro Devices Corp – VGA Port Companion Circuit
CM2009
VIDEO_1 3
4
VIDEO_2
VIDEO_3 5
VCC_VIDEO
2
SIMPLIFIED ELECTRICAL SCHEMATIC
VCC_DDC
7
BYP
8
VCC_SYNC
1
RT
RT
6
GND
DDC_IN1 10
DDC_IN2 11
SYNC_IN1 13
SYNC_IN2 15
GND
9 DDC_OUT1
12 DDC_OUT2
16 SYNC_OUT2
14 SYNC_OUT1
PACKAGE / PINOUT DIAGRAM
Top View
VCC_SYNC
1
VCC_VIDEO
2
VIDEO_1
3
VIDEO_2
4
VIDEO_3
5
GND
6
VCC_DDC
7
BYP
8
16
SYNC_OUT2
15
SYNC_IN2
14
SYNC_OUT1
13
SYNC_IN1
12
DDC_OUT2
11
DDC_IN2
10
DDC_IN1
9
DDC_OUT1
16 Pin QSOP
Table 1. PIN DESCRIPTIONS
Lead(s)
Name
Description
1
VCC_SYNC
This is an isolated supply input for the SYNC_1 and SYNC_2 level shifters and their associated ESD
protection circuits.
2
VCC_VIDEO
This is a supply pin specifically for the VIDEO_1, VIDEO_2 and VIDEO_3 ESD protection circuits.
3
VIDEO_1
Video signal ESD protection channel. This pin is typically tied one of the video lines between the VGA
controller device and the video connector.
4
VIDEO_2
Video signal ESD protection channel. This pin is typically tied one of the video lines between the VGA
controller device and the video connector.
5
VIDEO_3
Video signal ESD protection channel. This pin is typically tied one of the video lines between the VGA
controller device and the video connector.
6
GND
Ground reference supply pin.
7
VCC_DDC
This is an isolated supply input for the DDC_1 and DDC_2 level−shifting N−FET gates.
8
BYP
This input is used to connect an external 0.2 mF bypass capacitor to the DDC circuits, resulting in an
increased ESD withstand voltage rating for these circuits (±8 kV with vs. ±4 kV without).
9
DDC_OUT1 DDC signal output. Connects to the video connector side of one of the sync lines.
10
DDC_IN1
DDC signal input. Connects to the VGA controller side of one of the sync lines.
http://onsemi.com
2