AR0230 Datasheet, PDF (19/36 Pages) ON Semiconductor – Full HD Digital Image Sensor

AR0230CS: 1/2.7-Inch 2.1 Mp/Full HD Digital Image Sensor
Features Overview
Temperature Sensor
The AR0230CS sensor has a built-in PTAT-based temperature sensor, accessible through
registers, that is capable of measuring die junction temperature. The value read out from
the temperature sensor register is an ADC output value that needs to be converted
downstream to a final temperature value in degrees Celsius. Since the PTAT device char-
acteristic response is quite linear in the temperature range of operation required, a
simple linear function can be used to convert the ADC output value to the final tempera-
ture in degrees Celsius.
A single reference point will be made available via register read as well as a slope for
back-calculating the junction temperature value. An error of +/-5% or better over the full
specified operating range of the sensor is to be expected.
Silicon / Firmware / Sequencer Revision Information
A revision register will be provided to read out (via I²C) silicon and sequencer/OTPM
revision information. This will be helpful to distinguish among different lots of material
if there are future OTPM or sequencer revisions.
Lens Shading Correction
The latest lens shading correction algorithm will be included for potential low Z height
applications.
Companding
The 16-bit linearized HDR image may be compressed to 12- or 14- bits using on-chip
companding. This is useful if on-chip ALTM will not be used and the ISP cannot handle
16 bit data.
Compression
When the AR0230CS is configured for linear mode operation, the sensor can optionally
compress 12-bit data to 10-bit using A-law compression. The A-law compression is
disabled by default.
Packaging
The AR0230CS will be offered in a 10x10 80-iBGA package (parallel and HiSPi). The
package will have anti-reflective coating on both sides of the cover glass.
Parallel Interface
The parallel pixel data interface uses these output-only signals:
• FRAME_VALID
• LINE_VALID
• PIXCLK
• DOUT[11:0]
The parallel pixel data interface is disabled by default at power up and after reset. It can
be enabled by programming R0x301A. When the parallel pixel data interface is in use,
the serial data output signals can be left unconnected.
AR0230CS/D Rev. 8, Pub. 11/15 EN
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