NSVMMUN2212LT1G Datasheet, PDF (11/12 Pages) ON Semiconductor – NPN Transistors with Monolithic Bias Resistor Network

MUN2212, MMUN2212L, MUN5212, DTC124EE, DTC124EM3, NSBC124EF3
PACKAGE DIMENSIONS
−X−
D
b1
3
−Y−
E
2X e
1
2
TOP VIEW
2X b
0.08 X Y
3X L
1
3X L2
BOTTOM VIEW
SOT−723
CASE 631AA−01
ISSUE D
A
H_E
C
SIDE VIEW
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MILLIMETERS
DIM MIN NOM MAX
A 0.45 0.50 0.55
b 0.15 0.21 0.27
b1 0.25 0.31 0.37
C 0.07 0.12 0.17
D 1.15 1.20 1.25
E 0.75 0.80 0.85
e
0.40 BSC
H E 1.15 1.20 1.25
L
0.29 REF
L2 0.15 0.20 0.25
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
RECOMMENDED
SOLDERING FOOTPRINT*
2X 0.27
2X
0.40
PACKAGE
OUTLINE
1.50
3X 0.52
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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