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MC74LVX259_14 Datasheet, PDF (1/9 Pages) ON Semiconductor – 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter | |||
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MC74LVX259
8-Bit Addressable
Latch/1-of-8 Decoder
CMOS Logic Level Shifter
With LSTTLâCompatible Inputs
The MC74LVX259 is an 8âbit Addressable Latch fabricated with
silicon gate CMOS technology.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The LVX259 is designed for general purpose storage applications in
digital systems. The device has four modes of operation as shown in
the mode selection table. In the addressable latch mode, the data on
Data In is written into the addressed latch. The addressed latch follows
the data input with all nonâaddressed latches remaining in their
previous states. In the memory mode, all latches remain in their
previous state and are unaffected by the Data or Address inputs. In the
oneâofâeight decoding or demultiplexing mode, the addressed output
follows the state of Data In with all other outputs in the LOW state. In
the Reset mode, all outputs are LOW and unaffected by the address
and data inputs. When operating the LVX259 as an addressable latch,
changing more than one bit of the address could impose a transient
wrong address. Therefore, this should only be done while in the
memory mode.
The MC74LVX259 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74LVX259 to be used to interface 5.0 V circuits to
3.0 V circuits.
Features
⢠High Speed: tPD = 7.0 ns (Typ) at VCC = 3.3 V
⢠Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
⢠High Noise Immunity: VNIH = VNIL = 28% VCC
⢠CMOSâCompatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @Load
⢠Power Down Protection Provided on Inputs and Outputs
⢠Balanced Propagation Delays
⢠Pin and Function Compatible with Other Standard Logic Families
⢠Latchup Performance Exceeds 300 mA
⢠ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
⢠These Devices are PbâFree and are RoHS Compliant
http://onsemi.com
SOICâ16
D SUFFIX
CASE 751B
TSSOPâ16
DT SUFFIX
CASE 948F
PIN ASSIGNMENT
A0 1
A1 2
A2 3
Q0 4
Q1 5
Q2 6
Q3 7
GND 8
16 VCC
15 RESET
14 ENABLE
13 DATA IN
12 Q7
11 Q6
10 Q5
9 Q4
MARKING DIAGRAMS
16
LVX259G
AWLYWW
1
SOICâ16
16
LVX
259
ALYWG
G
1
TSSOPâ16
LVX259 = Specific Device Code
A
= Assembly Location
WL, L = Wafer Lot
Y
= Year
WW, W = Work Week
G or G = PbâFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
August, 2014 â Rev. 4
Publication Order Number:
MC74LVX259/D
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