CAV25640 Datasheet, PDF (1/14 Pages) ON Semiconductor – 64-Kb SPI Serial CMOS EEPROM

CAV25640
64-Kb SPI Serial CMOS
EEPROM
Description
The CAV25640 is a 64−Kb Serial CMOS EEPROM device
internally organized as 8Kx8 bits. This features a 64−byte page write
buffer and supports the Serial Peripheral Interface (SPI) protocol. The
device is enabled through a Chip Select (CS) input. In addition, the
required bus signals are clock input (SCK), data input (SI) and data
output (SO) lines. The HOLD input may be used to pause any serial
communication with the CAV25640 device. The device features
software and hardware write protection, including partial as well as
full array protection.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
• 10 MHz SPI Compatible
• 2.5 V to 5.5 V Supply Voltage Range
• SPI Modes (0,0) & (1,1)
• 64−byte Page Write Buffer
• Self−timed Write Cycle
• Hardware and Software Protection
• CAV Prefix for Automotive and Other Applications Requiring Site
and Change Control
• Block Write Protection
− Protect ¹/₄, ¹/₂ or Entire EEPROM Array
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• SOIC, TSSOP 8−lead and TDFN 8−pad Packages
• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
V_CC
SI
CS
WP
CAV25640
SO
HOLD
SCK
V_SS
Figure 1. Functional Symbol
http://onsemi.com
SOIC−8
V SUFFIX
CASE 751BD
TSSOP−8
Y SUFFIX
CASE 948AL
TDFN−8
VP2 SUFFIX
CASE 511AK
PIN CONFIGURATION
CS
1
SO
V_CC
HOLD
WP
SCK
V_SS
SI
SOIC (V), TSSOP (Y), TDFN (VP2)
Pin Name
CS
SO
WP
V_SS
SI
SCK
HOLD
V_CC
PIN FUNCTION
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
July, 2011 − Rev. 0
Publication Order Number:
CAV25640/D