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| 74HC237 Datasheet, PDF (9/17 Pages) NXP Semiconductors – 3-to-8 line decoder/demultiplexer with address latches | |||
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NXP Semiconductors
74HC237
3-to-8 line decoder, demultiplexer with address latches
VI 90 %
negative
pulse
GND
VI
positive
pulse
10 %
GND
VM
10 %
tf
tr
90 %
VM
VI
G
RT
tW
tW
VCC
DUT
VM
tr
tf
VM
VO
CL
001aah768
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 10. Test circuit for measuring switching times
Table 9. Test data
Type
74HC237
Input
VI
VCC
tr, tf
6.0 ns
Load
CL
15 pF, 50 pF
Test
tPLH, tPHL
74HC237
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 â 10 January 2011
© NXP B.V. 2011. All rights reserved.
9 of 17
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