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74HC237 Datasheet, PDF (4/17 Pages) NXP Semiconductors – 3-to-8 line decoder/demultiplexer with address latches
NXP Semiconductors
74HC237
3-to-8 line decoder, demultiplexer with address latches
5.2 Pin description
Table 2.
Symbol
A0 to A2
LE
E1
E2
Y0 to Y7
GND
VCC
Pin description
Pin
Description
1, 2, 3
data input
4
latch enable input (active LOW)
5
data enable input 1 (active LOW)
6
data enable input 2 (active HIGH)
15, 14, 13, 12, 11, 10, 9, 7 output
8
ground (0 V)
16
supply voltage
6. Functional description
Table 3: Function table
Enable
Input
Output
LE
E1
E2
A0
A1
A2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
H
L
H
X
X
X
stable
X
H
X
X
X
X
L
L
L
L
L
L
L
L
X
X
L
X
X
X
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
H
H
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
H
L
H
L
L
L
L
L
H
L
L
L
H
H
L
L
L
L
L
L
H
L
H
H
H
L
L
L
L
L
L
L
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to (VCC + 0.5 V)
DIP16 package
SO16 and SSOP16 packages
0.5
-
-
-
-
-
65
[1] -
[2] -
+7
V
20 mA
20 mA
25 mA
+50 mA
50 mA
+150 C
750 mW
500 mW
74HC237
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 January 2011
© NXP B.V. 2011. All rights reserved.
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