74HC237 Datasheet, PDF (3/17 Pages) NXP Semiconductors – 3-to-8 line decoder/demultiplexer with address latches

NXP Semiconductors
74HC237
3-to-8 line decoder, demultiplexer with address latches
A0
A0
LATCH _A0
LE
LE
A1
A1
LATCH _A1
LE
LE
A2
A2
LATCH _A2
LE
LE
LE
E1
E2
Fig 4. Logic diagram
5. Pinning information
5.1 Pinning
74HC237
A0 1
A1 2
16 V_CC
15 Y0
A2 3
14 Y1
LE 4
13 Y2
E1 5
12 Y3
E2 6
11 Y4
Y7 7
10 Y5
GND 8
9 Y6
001aab868
Fig 5. Pin configuration DIP16 and SO16
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
001aab872
74HC237
A0 1
A1 2
A2 3
LE 4
E1 5
E2 6
Y7 7
GND 8
16 V_CC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
001aan382
Fig 6. Pin configuration SSOP16
74HC237
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 January 2011
© NXP B.V. 2011. All rights reserved.
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