74HC237 Datasheet, PDF (8/17 Pages) NXP Semiconductors – 3-to-8 line decoder/demultiplexer with address latches

NXP Semiconductors
74HC237
3-to-8 line decoder, demultiplexer with address latches
E1 input
V_M
Yn output
t_PHL
V_M
t_PLH
t_THL
t_TLH
001aab874
Fig 8.
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Propagation enable inputs (E1) to output (Yn) and output transition time
An input
V_M
LE input
t_su
transparant
t_h
V_M
latched
t_su
t_h
transparant latched
t_W
001aab875
Fig 9.
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
The data input (An) to latch enable input (LE) set-up times, latch enable input (LE) to data input (An) hold
times and latch enable input (LE) pulse width
Table 8. Measurement points
Type
74HC237
Input
V_M
0.5V_CC
Output
V_M
0.5V_CC
74HC237
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 January 2011
© NXP B.V. 2011. All rights reserved.
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