PRTR5V0U2D Datasheet, PDF (8/12 Pages) NXP Semiconductors – Ultra low capacitance double rail-to-rail ESD protection

NXP Semiconductors
8. Package outline
PRTR5V0U2D
Ultra low capacitance double rail-to-rail ESD protection
3.1
2.7
6
5
3.0 1.7
2.5 1.3
pin 1 index
1.1
0.9
4
0.6
0.2
1
2
0.95
1.9
Dimensions in mm
Fig 6. Package outline SOT457 (SC-74)
3
0.40
0.25
0.26
0.10
04-11-08
9. Packing information
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.^[1]
Type number Package Description
Packing quantity
3 000
10 000
PRTR5V0U2D SOT457 4 mm pitch, 8 mm tape and reel; T1
[2] _-115
-135
4 mm pitch, 8 mm tape and reel; T2
[3] _-125
-165
[1] For further information and the availability of packing methods, see Section 13.
[2] T1: normal taping
[3] T2: reverse taping
PRTR5V0U2D_1
Product data sheet
Rev. 01 — 28 April 2009
© NXP B.V. 2009. All rights reserved.
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