PRTR5V0U2D Datasheet, PDF (5/12 Pages) NXP Semiconductors – Ultra low capacitance double rail-to-rail ESD protection

NXP Semiconductors
PRTR5V0U2D
Ultra low capacitance double rail-to-rail ESD protection
6. Characteristics
Table 8. Characteristics
T_amb = 25 °C unless otherwise specified.
Symbol Parameter
Per channel
I_R
C_(I/O-GND)
reverse current
input/output to ground
capacitance
C_(I/O-I/O)
input/output to input/output
capacitance
V_F
forward voltage
Zener diode
V_RWM
V_BR
C_sup
reverse standoff voltage
breakdown voltage
supply pin to ground
capacitance
[1] Measured from pin 1, 3, 4 or 6 to ground.
[2] Measured from pin 1 or 6 to pin 3 or 4.
[3] Measured from pin 1, 3, 4 or 6 to pin 5.
[4] Measured from pin 5 to ground.
Conditions
V_R = 5 V
f = 1 MHz;
V_(I/O-GND) = 0 V
f = 1 MHz;
V_(I/O-I/O) = 0 V
I_F = 1 mA
f = 1 MHz;
V_CC = 0 V
Min Typ Max Unit
[1] _-
< 1 100 nA
[1] _-
1.0 1.5 pF
[2] _-
0.6 -
pF
[3] _-
0.7 -
V
[4] _-
[4] ₆
[4] _-
-
5.5 V
-
9
V
16 -
pF
2.0
C_(I/O-GND)
(pF)
1.6
006aaa483
1.2
0.8
0.4
0
0
1
2
3
4
5
V_(I/O-GND) (V)
Fig 2.
f = 1 MHz; T_amb = 25 °C
Input/output to ground capacitance as a
function of input/output to ground voltage;
typical values
1.0
C_(I/O-I/O)
(pF)
0.8
006aaa484
0.6
0.4
0.2
0
0
1
2
3
4
5
V_(I/O-I/O) (V)
Fig 3.
f = 1 MHz; T_amb = 25 °C
Input/output to ground capacitance as a
function of input/output to input/output
voltage; typical values
PRTR5V0U2D_1
Product data sheet
Rev. 01 — 28 April 2009
© NXP B.V. 2009. All rights reserved.
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