74AUP2G38 Datasheet, PDF (8/17 Pages) NXP Semiconductors – Low-power dual 2-input NAND gate (open-drain)

NXP Semiconductors
74AUP2G38
Low-power dual 2-input NAND gate; open drain
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
25 °C
Min Typ^[1] Max
C_L = 5 pF
t_pd
propagation delay
C_L = 10 pF
t_pd
propagation delay
C_L = 15 pF
t_pd
propagation delay
C_L = 30 pF
t_pd
propagation delay
nA, nB to nY; see Figure 8
V_CC = 0.8 V
V_CC = 1.1 V to 1.3 V
V_CC = 1.4 V to 1.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3.0 V to 3.6 V
nA, nB to nY; see Figure 8
V_CC = 0.8 V
V_CC = 1.1 V to 1.3 V
V_CC = 1.4 V to 1.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3.0 V to 3.6 V
nA, nB to nY; see Figure 8
V_CC = 0.8 V
V_CC = 1.1 V to 1.3 V
V_CC = 1.4 V to 1.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3.0 V to 3.6 V
nA, nB to nY; see Figure 8
V_CC = 0.8 V
V_CC = 1.1 V to 1.3 V
V_CC = 1.4 V to 1.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3.0 V to 3.6 V
[2]
-
1.9
1.5
1.2
1.0
0.9
[2]
-
2.3
1.8
1.6
1.4
1.3
[2]
-
2.6
2.1
1.9
1.6
1.6
[2]
-
3.6
2.9
2.6
2.4
2.3
13.5 -
4.6 10.4
3.3 6.5
2.9 5.1
2.2 3.8
2.3 4.0
16.3 -
5.6 12.3
4.1 7.6
3.8 6.1
2.9 4.6
3.2 5.7
19.0 -
6.6 14.2
4.8 8.7
4.6 7.6
3.6 5.6
4.1 7.5
27.0 -
9.5 19.5
7.0 11.5
7.0 12.1
5.4 8.9
6.5 12.7
−40 °C to +125 °C
Unit
Min Max
Max
(85 °C) (125 °C)
-
-
-
ns
1.8 11.4
12.6
ns
1.4 7.4
8.2
ns
1.1 5.9
6.5
ns
0.9 4.5
4.9
ns
0.8 4.5
4.9
ns
-
-
-
ns
2.1 13.7
15.1
ns
1.7 8.8
9.7
ns
1.4 7.1
7.8
ns
1.2 5.4
5.9
ns
1.1 6.4
7.0
ns
-
-
-
ns
2.4 15.8
17.4
ns
1.9 10.1
11.1
ns
1.7 8.5
9.3
ns
1.5 6.3
6.9
ns
1.4 8.3
9.1
ns
-
-
-
ns
3.2 21.8
24.0
ns
2.6 13.6
15.0
ns
2.3 13.3
14.6
ns
2.1 9.9
10.9
ns
2.1 13.9
15.3
ns
74AUP2G38_4
Product data sheet
Rev. 04 — 8 October 2009
© NXP B.V. 2009. All rights reserved.
8 of 17