74AUP2G38 Datasheet, PDF (4/17 Pages) NXP Semiconductors – Low-power dual 2-input NAND gate (open-drain)

NXP Semiconductors
74AUP2G38
Low-power dual 2-input NAND gate; open drain
7. Functional description
Table 4. Function table^[1]
Input
nA
nB
L
L
L
H
H
L
H
H
[1] H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF state.
8. Limiting values
Output
nY
Z
Z
Z
L
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
V_CC
supply voltage
−0.5
+4.6
V
I_IK
input clamping current
V_I < 0 V
−50
-
mA
V_I
input voltage
[1] _−0.5
+4.6
V
I_OK
output clamping current V_O < 0 V
−50
-
mA
V_O
output voltage
Active mode and Power-down mode
[1] _−0.5
+4.6
V
I_O
output current
V_O = 0 V to V_CC
-
+20
mA
I_CC
I_GND
T_stg
P_tot
supply current
ground current
storage temperature
total power dissipation
T_amb = −40 °C to +125 °C
-
−50
−65
[2] _-
+50
mA
-
mA
+150
°C
250
mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For VSSOP8 packages: above 110 °C the value of P_tot derates linearly at 8.0 mW/K.
For XSON8, XSON8U and XQFN8U packages: above 118 °C the value of P_tot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
V_CC
V_I
V_O
T_amb
∆t/∆V
Operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
Conditions
Active mode and Power-down mode
V_CC = 0.8 V to 3.6 V
Min
Max
Unit
0.8
3.6
V
0
3.6
V
0
3.6
V
−40
+125
°C
0
200
ns/V
74AUP2G38_4
Product data sheet
Rev. 04 — 8 October 2009
© NXP B.V. 2009. All rights reserved.
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