74ABT16821A Datasheet, PDF (8/16 Pages) NXP Semiconductors – 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

NXP Semiconductors
74ABT16821A
20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; for test circuit, see Figure 8.
Symbol Parameter
Conditions
f_max
t_PLH
t_PHL
t_PZH
t_PZL
t_PHZ
t_PLZ
t_su(H)
t_su(L)
t_h(H)
t_h(L)
t_WH
t_WL
maximum
frequency
see Figure 5
LOW to HIGH
nCP to nQx, see Figure 5
propagation delay
HIGH to LOW
nCP to nQx, see Figure 5
propagation delay
OFF-state to HIGH nOE to nQx; see Figure 6
propagation delay
OFF-state to LOW nOE to nQx; see Figure 6
propagation delay
HIGH to OFF-state nOE to nQx; see Figure 6
propagation delay
LOW to OFF-state nOE to nQx; see Figure 6
propagation delay
set-up time HIGH nDx to nCP; see Figure 7
set-up time LOW nDx to nCP; see Figure 7
hold time HIGH
nDx to nCP; see Figure 7
hold time LOW
nDx to nCP; see Figure 7
pulse width HIGH nCP; see Figure 5
pulse width LOW nCP; see Figure 5
25 °C; V_CC = 5.0 V −40 °C to +85 °C; Unit
V_CC = 5.0 V ± 0.5 V
Min Typ Max Min
Max
160 250 -
160
- MHz
1.3 2.4 3.3 1.3
3.7 ns
1.1 2.0 2.6 1.1
3.0 ns
1.4 2.5 3.3 1.4
4.1 ns
1.2 2.3 3.0 1.2
3.7 ns
1.6 3.2 4.1 1.6
4.8 ns
1.3 2.3 3.1 1.3
3.3 ns
1.8 1.2 -
+1.8 −0.9 -
1.0 0.8 -
+1.0 −1.0 -
2.5 0.8 -
2.5 1.0 -
1.8
+1.8
1.0
+1.0
2.5
2.5
- ns
- ns
- ns
- ns
- ns
- ns
74ABT16821A_3
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 16 March 2010
© NXP B.V. 2010. All rights reserved.
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