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74ABT16821A Datasheet, PDF (7/16 Pages) NXP Semiconductors – 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State
NXP Semiconductors
74ABT16821A
20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state
9. Static characteristics
Table 6. Static characteristics
Symbol Parameter
Conditions
VIK
VOH
VOL
VOL(pu)
II
IOFF
IO(pu/pd)
IOZ
ILO
IO
ICC
ΔICC
CI
CO
input clamping voltage VCC = 4.5 V; IIK = −18 mA
HIGH-level output
voltage
VI = VIL or VIH
VCC = 4.5 V; IOH = −3 mA
VCC = 5.0 V; IOH = −3 mA
VCC = 4.5 V; IOH = −32 mA
LOW-level output
voltage
VCC = 4.5 V; IOL = 64 mA;
VI = VIL or VIH
power-up LOW-level VCC = 5.5 V; IO = 1 mA;
output voltage
VI = GND or VCC
input leakage current VCC = 5.5 V; VI = VCC or GND
power-off leakage
current
VCC = 0 V; VI or VO ≤ 4.5 V
power-up/power-down VCC = 2.1 V; VO = 0.5 V;
output current
VI = GND or VCC; nOE don’t care
OFF-state output
current
VCC = 5.5 V; VI = VIL or VIH
output HIGH-state at VO = 2.7 V
output LOW-state at VO = 0.5 V
output leakage current HIGH-state; VO = 5.5 V;
VCC = 5.5 V; VI = GND or VCC
output current
VCC = 5.5 V; VO = 2.5 V
supply current
VCC = 5.5 V; VI = GND or VCC
outputs HIGH-state
outputs LOW-state
outputs 3-state
additional supply
current
per input pin; VCC = 5.5 V; one input
at 3.4 V and other inputs at VCC or
GND
input capacitance
output capacitance
VI = 0 V or VCC
outputs disabled; VO = 0 V or VCC
25 °C
−40 °C to +85 °C Unit
Min Typ Max Min Max
−1.2 −0.9 - −1.2
-V
2.5 2.9 -
2.5
3.0 3.4 -
3.0
2.0 2.4 -
2.0
- 0.36 0.55 -
[1] - 0.13 0.55
-
- ±0.01 ±1.0 -
- ±5.0 ±100 -
[2] - ±5.0 ±50
-
-V
-V
-V
0.55 V
0.55 V
±1.0 μA
±100 μA
±50 μA
- 1.0 10
-
- −1.0 −10
-
- 5.0 50
-
[3] −180 −90 −50 −180
10 μA
−10 μA
50 μA
−50 mA
- 0.5 1.0
-
- 10 19
-
- 0.5 1.0
-
[4] - 0.25 1.5
-
1.0 mA
19 mA
1.0 mA
1.5 mA
-
3
-
-
-
-
7
-
-
-
[1] For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
[2] This parameter is valid for any VCC between 0 V and 2.1 V, with a transition time of up to 10 ms. From VCC = 2.1 V to VCC = 5 V ± 10 %
a transition time of up to 100 μs is permitted.
[3] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[4] This is the increase in supply current for each input at 3.4 V.
74ABT16821A_3
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 16 March 2010
© NXP B.V. 2010. All rights reserved.
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