PSMN3R5-30YL Datasheet, PDF (7/13 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
PSMN3R5-30YL
N-channel TrenchMOS logic level FET
003aac718
120
g_fs
(S)
100
80
60
40
0
10
20
30
40 _{ID (A)} 50
15
Fig 9. Forward transconductance as a function of
drain current; typical values
10^−3
I_D
(A)
10^−4
003aab271
min typ
max
10^−5
10^−6
0
0.5
1
1.5
2
2.5
V_GS (V)
3
V_GS(th)
(V)
2
1.5
1
0.5
0
-60
max
typ
min
003aab272
0
60
120
180
T_j (°C)
Fig 10. Gate-source threshold voltage as a function of
junction temperature
6
R_DSon
(mΩ)
5
V_GS (V) = 3.2
003aac707
4
4.5
3
10
2
0
20
40
60
80 _{ID (A)} 100
Fig 11. Sub-threshold drain current as a function of
gate-source voltage
Fig 12. Drain-source on-state resistance as a function
of drain current; typical values
PSMN3R5-30YL_1
Preliminary data sheet
Rev. 01 — 14 October 2008
© NXP B.V. 2008. All rights reserved.
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