TDA8024 Datasheet, PDF (21/29 Pages) NXP Semiconductors – IC card interface

Philips Semiconductors
IC card interface
Product specification
TDA8024
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP
t_f
fall time
C_L = 30 pF; note 5
−
−
δ
duty factor (except for
C_L = 30 pF; note 5
f_XTAL)
45
−
SR
slew rate
slew up or down; C_L = 30 pF 0.2
−
Control inputs (pins CLKDIV1, CLKDIV2, CMDVCC, RSTIN and 5V/3V); note 6
V_IL
V_IH
I_LIL
I_LIH
LOW-level input voltage
HIGH-level input voltage
LOW-level input leakage
current
HIGH-level input leakage
current
0 < V_IL < V_DD
0 < V_IH < V_DD
−0.3
−
0.7V_DD
−
−
−
−
−
Card presence inputs (pins PRES and PRES); note 7
V_IL
V_IH
I_LIL
I_LIH
LOW-level input voltage
HIGH-level input voltage
LOW-level input leakage
current
HIGH-level input leakage
current
0 < V_IL < V_DD
0 < V_IH < V_DD
−0.3
−
0.7V_DD
−
−
−
−
−
Interrupt output (pin OFF; NMOS drain with integrated 20 kΩ pull-up resistor to V_DD)
V_OL
LOW-level output voltage I_OL = 2 mA
0
−
V_OH
HIGH-level output voltage I_OH = −15 µA
0.75V_DD −
R_pu
integrated pull-up resistor 20 kΩ pull-up resistor to V_DD 16
20
Protection and limitation
I_CC(sd)
I_I/O(lim)
shutdown and limitation
current pin V_CC
limitation current pins I/O,
AUX1 and AUX2
−
130
−15
−
I_CLK(lim)
I_RST(lim)
T_sd
limitation current pin CLK
limitation current pin RST
shut-down temperature
−70
−
−20
−
−
150
Timing
t_act
activation time
see Fig.7
t_de
deactivation time
see Fig.8
t₃
start of the window for
see Fig.7
sending CLK to the card
50
−
50
80
50
−
t₅
end of the window for
see Fig.7
sending CLK to the card
140
−
t_debounce
debounce time pins PRES see Fig.10
and PRES
5
8
MAX.
16
55
UNIT
ns
%
−
V/ns
+0.3V_DD V
V_DD + 0.3 V
1
µA
1
µA
+0.3V_DD V
V_DD + 0.3 V
5
µA
5
µA
0.3
V
−
V
24
kΩ
150
mA
+15
mA
+70
mA
+20
mA
−
°C
220
µs
100
µs
130
µs
220
µs
11
ms
2004 July 12
21