TDA8024 Datasheet, PDF (16/29 Pages) NXP Semiconductors – IC card interface

Philips Semiconductors
IC card interface
Product specification
TDA8024
9 LIMITING VALUES
SYMBOL
V_DD
V_DDP
V_I, V_O
PARAMETER
supply voltage
DC/DC converter supply voltage
voltage on input and output pins
V_card
V_n
T_j(max)
T_stg
V_esd
voltage on card pins
voltage on other pins
maximum junction temperature
storage temperature
electrostatic discharge voltage
CONDITIONS
MIN.
−0.3
−0.3
pins XTAL1, XTAL2, 5V/3V, RSTIN, −0.3
AUX1UC, AUX2UC, I/OUC,
CLKDIV1, CLKDIV2, CMDVCC, OFF
and PORADJ
pins PRES, PRES, I/O, RST, AUX1, −0.3
AUX2 and CLK
pins V_UP, S1 and S2
−0.3
−
−55
card contacts in typical application;
notes 1 and 2
pins I/O, RST, V_CC, AUX1, AUX2, −6
CLK, PRES and PRES
all pins; note 1
human body model; notes 2 and 3 −2
machine model; note 4
−200
MAX.
+6.5
+6.5
+6.5
UNIT
V
V
V
+6.5 V
+6.5 V
150
°C
+150 °C
+6
kV
+2
kV
+200 V
Notes
1. All card contacts are protected against any short-circuit with any other card contact.
2. Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM; 1500 Ω and 100 pF) 3 pulses positive and 3 pulses negative on each pin referenced to ground.
3. In accordance with EIA/JESD22-A114-B, June 2000.
4. In accordance with EIA/JESD22-A115-A, October 1997.
10 HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take
normal precautions appropriate to handling MOS devices (see “Handling MOS devices”).
11 THERMAL CHARACTERISTICS
SYMBOL
R_th(j-a)
PARAMETER
thermal resistance from junction
to ambient
TDA8024T
TDA8024AT
TDA8024TT
CONDITIONS
in free air
VALUE
UNIT
70
K/W
70
K/W
100⁽¹⁾
K/W
Note
1. This figure was obtained using the following PCB technology: FR, 4 layers, 0.5 mm thickness, class 5, copper
thickness 35 µm, Ni/Go plating, ground plane in internal layers
2004 July 12
16