PHP79NQ08LT Datasheet, PDF (2/13 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
gate
D
drain
S
source
D
mounting base; connected to
drain
Simplified outline
mb
PHP79NQ08LT
N-channel TrenchMOS logic level FET
Graphic symbol
D
G
mbb076 S
3. Ordering information
123
SOT78 (TO-220AB)
Table 3. Ordering information
Type number
Package
Name
PHP79NQ08LT
TO-220AB
4. Limiting values
Description
plastic single-ended package; heatsink mounted; 1 mounting
hole; 3-lead TO-220AB
Version
SOT78
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
V_DS
V_DGR
V_GS
I_D
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T_j ≥ 25 °C; T_j ≤ 175 °C
T_j ≤ 175 °C; T_j ≥ 25 °C; R_GS = 20 kΩ
V_GS = 10 V; T_mb = 25 °C
V_GS = 5 V; T_mb = 100 °C; see Figure 1
V_GS = 10 V; T_mb = 100 °C
V_GS = 5 V; T_mb = 25 °C; see Figure 1;
see Figure 3
I_DM
peak drain current
t_p ≤ 10 µs; pulsed; T_mb = 25 °C;
see Figure 3
P_tot
total power dissipation
T_stg
storage temperature
T_j
junction temperature
Source-drain diode
T_mb = 25 °C; see Figure 2
I_S
source current
T_mb = 25 °C
Min Typ Max Unit
-
-
75 V
-
-
75 V
-15 -
15 V
-
-
73 A
-
-
47 A
-
-
51 A
-
-
67 A
-
-
240 A
-
-
-55 -
-55 -
157 W
175 °C
175 °C
-
-
67 A
PHP79NQ08LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 26 April 2010
© NXP B.V. 2010. All rights reserved.
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