74HC11 Datasheet, PDF (2/15 Pages) NXP Semiconductors – Triple 3-input AND gate

NXP Semiconductors
4. Functional diagram
74HC11; 74HCT11
Triple 3-input AND gate
1 1A
2 1B
13 1C
3 2A
4 2B
5 2C
9 3A
10 3B
11 3C
1Y 12
2Y 6
3Y 8
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Fig 1. Logic symbol
1
2
&
12
13
3
4
&
6
5
9
10
&
8
11
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Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
A
B
Y
C
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Fig 3. Logic diagram for one gate
74HC11
74 HCT11
1A 1
1B 2
14 V_CC
13 1C
2A 3
12 1Y
2B 4
2C 5
11 3C
10 3B
2Y 6
9 3A
GND 7
8 3Y
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Fig 4. Pin configuration DIP14 and SO14
74HC11
74HCT11
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 V_CC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
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Fig 5. Pin configuration (T)SSOP14
5.2 Pin description
Table 2. Pin description
Symbol
Pin
1A, 2A, 3A
1, 3, 9
1B, 2B, 3B
2, 4, 10
GND
7
1C, 2C, 3C
13, 5, 11
1Y, 2Y, 3Y
12, 6, 8
V_CC
14
Description
data input
data input
ground (0 V)
data input
data output
supply voltage
74HC_HCT11_4
Product data sheet
Rev. 04 — 25 March 2010
© NXP B.V. 2010. All rights reserved.
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