ADC1010S Datasheet, PDF (16/36 Pages) NXP Semiconductors – Single 10-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs

NXP Semiconductors
ADC1010S series
ADC1010S series; CMOS or LVDS DDR digital outputs
11.3 System reference and power management
11.3.1 Internal/external references
The ADC1010S has a stable and accurate built-in internal reference voltage to adjust the
ADC full-scale. This reference voltage can be set internally via SPI or with pins VREF and
SENSE (programmable in 1 dB steps between 0 dB and −6 dB via control bits
INTREF[2:0] when bit INTREF_EN = 1; see Table 22). See Figure 13, Figure 14,
Figure 15 and Figure 16. The equivalent reference circuit is shown in Figure 12. External
reference is also possible by providing a voltage on pin VREF as described in Figure 15.
VREF
REFERENCE
AMP
BUFFER
EXT_ref
EXT_ref
BANDGAP
REFERENCE
REFT
REFB
SENSE
SELECTION
LOGIC
ADC CORE
Fig 12. Reference equivalent schematic
005aaa164
If bit INTREF_EN is set to 0, the reference voltage will be determined either internally or
externally as detailed in Table 12.
Table 12. Reference selection
Selection
SPI bit
INTREF_EN
SENSE pin VREF pin
full-scale (p-p)
internal
0
(Figure 13)
AGND
330 pF capacitor to AGND 2 V
internal
0
(Figure 14)
pin VREF connected to pin SENSE and via 1 V
a 330 pF capacitor to AGND
external
0
(Figure 15)
V_DDA
external voltage between 1 V to 2 V
0.5 V and 1 V^[1]
internal via SPI 1
(Figure 16)
pin VREF connected to pin SENSE and via 1 V to 2 V
330 pF capacitor to AGND
[1] The voltage on pin VREF is doubled internally to generate the internal reference voltage.
ADC1010S_SER_1
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 9 April 2010
© NXP B.V. 2010. All rights reserved.
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