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TDA8034T Datasheet, PDF (15/29 Pages) NXP Semiconductors – Smart card interface
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NXP Semiconductors
TDA8034T; TDA8034AT
Smart card interface
Table 7. Characteristics of IC supply voltage …continued
VDDP = 5 V; VDD = 3.3 V; VDD(INTF) = 3.3 V; fxtal = 10 MHz; GND = 0 V; Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
SR
slew rate
5 V card
0.055
0.180
0.300
V/μs
3 V card
0.040
0.180
0.300
V/μs
Crystal oscillator: pins XTAL1 and XTAL2
Cext
external capacitance pins XTAL1 and XTAL2
-
-
(depending on the crystal or
resonator specification)
15
pF
fxtal
crystal frequency
card clock reference; crystal 2
-
oscillator
26
MHz
fext
external frequency
VIL
LOW-level input
voltage
VIH
HIGH-level input
voltage
Data lines: pins I/O and I/OUC
external clock on pin XTAL1
crystal oscillator
external clock
crystal oscillator
external clock
0
-
−0.3
-
−0.3
-
0.7VDD
-
0.7VDD(INTF) -
26
MHz
+0.3VDD
V
+0.3VDD(INTF) V
VDD + 0.3
V
VDD(INTF) + 0.3 V
td
delay time
falling edge on pins I/O and
-
-
I/OUC or vise versa
200
ns
tw(pu)
pull-up pulse width
fio
input/output frequency
Ci
input capacitance
Data lines to the card: pin I/O[3]
on data lines
on data lines
200
-
-
-
-
-
400
ns
1
MHz
10
pF
Vo
output voltage
Shutdown mode
no load
0
-
0.1
V
Io = 1 mA
0
-
Io
output current
Shutdown mode; pin I/O
-
-
grounded
0.3
V
−1
mA
VOL
LOW-level output
IOL = 1 mA
voltage
IOL ≥ 15 mA
VOH
HIGH-level output
no DC load
voltage
IOH < −40 μA
IOH ≥ −15 mA
VIL
LOW-level input
voltage
0
-
VCC − 0.4
-
0.9VCC
-
0.75VCC
-
0
-
−0.3
-
0.3
V
VCC
V
VCC + 0.1
V
VCC + 0.1
V
0.4
V
+0.8
V
VIH
HIGH-level input
voltage
VCC = +5 V
VCC = +3 V
Vhys
hysteresis voltage
pin I/O
IIL
LOW-level input current pin I/O; VIL = 0 V
IIH
HIGH-level input
pin I/O; VIH = VCC
current
0.6VCC
-
0.7VCC
-
-
50
-
-
-
-
VCC + 0.3
V
VCC + 0.3
V
-
mV
600
μA
10
μA
tr(i)
input rise time
VIL maximum to
VIH minimum
-
-
tr(o)
output rise time
CL ≤ 80 pF; 10 % to 90 %;
-
-
0 V to VCC
1.2
μs
0.1
μs
TDA8034T_TDA8034AT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0. — 12 November 2010
© NXP B.V. 2010. All rights reserved.
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