MCIMX6DP5EYM1AA Datasheet, PDF(114/168 Page) NXP Semiconductors – i.MX 6DualPlus/6QuadPlus Automotive Applications Processors

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MCIMX6DP5EYM1AA Datasheet, PDF (114/168 Pages) NXP Semiconductors – i.MX 6DualPlus/6QuadPlus Automotive Applications Processors

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Electrical Characteristics

Table 73. Electrical and Timing Information (continued)

Symbol

tCDC

tCPH

tCPL

tSKEW[PN]

tSKEW[TX]

ÎVCMTX(HF)

ÎVCMTX(LF)

trlp,tflp

treo

Î´V/Î´tSR

tSETUP[RX]

tHOLD[RX]

ÎVCMRX(HF)

ÎVCMRX(LF)

CCM

eSPIKE

TMIN

VINT

fINT

CPAD

CPIN

Parameters

Test Conditions

Min

Typ

DDR CLK duty cycle

DDR CLK high time

tCDC = tCPH / PDDRCLK

DDR CLK low time

DDR CLK / DATA Jitter

Intra-Pair (Pulse) skew

Data to Clock Skew

Differential output signal rise time

20% to 80%, RL = 50 Î©

Differential output signal fall time

20% to 80%, RL = 50 Î©

Common level variation above 450 MHz 80 Î©<= RL< = 125 Î©

Common level variation between 50

MHz and 450 MHz

80 Î©<= RL< = 125 Î©

0.350

150

0.075

LP Line Drivers AC Specifications

Single ended output rise/fall time

15% to 85%, CL<70 pF

30% to 85%, CL<70 pF

Signal slew rate

15% to 85%, CL<70 pF

Load capacitance

HS Line Receiver AC Specifications

Data to Clock Receiver Setup time

0.15

Clock to Data Receiver Hold time

0.15

Common mode interference beyond

450 MHz

Common mode interference between

50 MHz and 450 MHz

-50

Common mode termination

LP Line Receiver AC Specifications

Input pulse rejection

Minimum pulse response

Pk-to-Pk interference voltage

Interference frequency

450

Model Parameters used for Driver Load switching performance evaluation

Equivalent Single ended I/O PAD

capacitance.

Equivalent Single ended Package +

PCB capacitance.

Max Unit

â ps pk-pk

0.650

0.3UI

mVrms

mVp

120 mV/ns

200 mVpp

mVpp

300

Vps

400

MHz

i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 1, 03/2016

114

Freescale Semiconductor Inc.

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