M58LR128KC Datasheet, PDF (69/108 Pages) Numonyx B.V – 128 or 256 Mbit (x16, mux I/O, multiple bank, multilevel interface, burst) 1.8 V supply Flash memories

M58LRxxxKC, M58LRxxxKD
Figure 16. Reset and power-up AC waveforms
DC and AC parameters
W, E, G, L
RP
tPHWL
tPHEL
tPHGL
tPHLL
tPLWL
tPLEL
tPLGL
tPLLL
VDD, VDDQ
tVDHPH
Power-Up
tPLPH
Reset
Table 28. Reset and power-up AC characteristics
Symbol
Parameter
Test condition
t_PLWL
t_PLEL
t_PLGL
t_PLLL
Reset Low to
Write Enable Low,
Chip Enable Low,
Output Enable Low,
Latch Enable Low
During program
During erase
Other conditions
Min
25
Min
25
Min
80
t_PHWL
t_PHEL
t_PHGL
t_PHLL
t_PLPH(1),(2)
t_VDHPH(3)
Reset High to
Write Enable Low
Chip Enable Low
Output Enable Low
Latch Enable Low
RP pulse width
Supply voltages High to Reset High
Min
30
Min
50
Min
300
1. The device Reset is possible but not guaranteed if t_PLPH < 50 ns.
2. Sampled only, not 100% tested.
3. It is important to assert RP in order to allow proper CPU initialization during power-up or reset.
Unit
µs
µs
ns
ns
ns
µs
AI06976
69/108