M58LR128KC Datasheet, PDF (14/108 Pages) Numonyx B.V – 128 or 256 Mbit (x16, mux I/O, multiple bank, multilevel interface, burst) 1.8 V supply Flash memories

Signal descriptions
M58LRxxxKC, M58LRxxxKD
2.7
Reset (RP)
The Reset input provides a hardware reset of the memory. When Reset is at V_IL, the
memory is in reset mode: the outputs are high impedance and the current consumption is
reduced to the reset supply current I_DD2. Refer to Table 22: DC characteristics - currents, for
the value of I_DD2. After Reset all blocks are in the locked state and the Configuration
Register is reset. When Reset is at V_IH, the device is in normal operation. Exiting reset
mode the device enters asynchronous read mode, but a negative transition of Chip Enable
or Latch Enable is required to ensure valid data outputs.
2.8
Latch Enable (L)
Latch Enable latches the ADQ0-ADQ15 and A16-Amax address bits on its rising edge. The
address latch is transparent when Latch Enable is at V_IL and it is inhibited when Latch
Enable is at V_IH.
2.9
Clock (K)
The clock input synchronizes the memory to the microcontroller during synchronous read
operations; the address is latched on a Clock edge (rising or falling, according to the
configuration settings) when Latch Enable is at V_IL. Clock is ignored during asynchronous
read and in write operations.
2.10
2.11
Wait (WAIT)
Wait is an output signal used during synchronous read to indicate whether the data on the
output bus are valid. This output is high impedance when Chip Enable is at V_IH or Reset is
at V_IL. It can be configured to be active during the wait cycle or one clock cycle in advance.
The WAIT signal is forced deasserted when Output Enable is at V_IH.
V_DD supply voltage
V_DD provides the power supply to the internal core of the memory device. It is the main
power supply for all operations (read, program and erase).
2.12
V_DDQ supply voltage
V_DDQ provides the power supply to the I/O pins and enables all outputs to be powered
independently from V_DD. V_DDQ can be tied to V_DD or can use a separate supply.
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