|
SMCXXXAF Datasheet, PDF (44/82 Pages) Numonyx B.V – 32 Mbyte, 64 Mbyte, 128 Mbyte, 256 Mbyte and 512 Mbyte 3.3 V / 5 V supply CompactFlash™ card | |||
|
◁ |
CF-ATA registers
8
CF-ATA registers
SMCxxxAF
The following section describes the hardware registers used by the host software to issue
commands to the card. These registers are collectively referred to as the âtask fileâ.
8.1
Data register (address 1F0h [170h]; offset 0, 8, 9)
The data register is a 16-bit register used to transfer data blocks between the card data
buffer and the host. This register overlaps the error register. Table 40 describes the
combinations of data register access and explains the overlapped data and error/feature
registers. Because of the overlapped registers, access to the 1F1h, 171h or offset 1 are not
defined for word (âCE2 and âCE1 set to â0â) operations, and are treated as accesses to the
word data register. The duplicated registers at offsets 8, 9 and Dh have no restrictions on
the operations that can be performed.
Table 40. Data register access
Data register
âCE2
Word Data register
0
Even Data register
1
Odd Data register
1
Odd Data register
0
Error/Feature register
1
Error/Feature register
0
Error/Feature register
0
âCE1 A0
0
X
0
0
0
1
1
X
0
1
1
X
0
X
Offset
0, 8, 9
0, 8
9
8, 9
1, Dh
1
Dh
Data Bus
D15 to D0
D7 to D0
D7 to D0
D15 to D8
D7 to D0
D15 to D8
D15 to D8
8.2
8.2.1
8.2.2
8.2.3
Error register (address 1F1h [171h]; offset 1, 0Dh read only)
This read only register contains additional information about the source of an error when an
error is indicated in bit 0 of the status register. The bits are defined in Table 41. This register
is accessed on data bits D15 to D8 during a write operation to offset 0 with âCE2 Low and â
CE1 High.
Bit 7 (BBK)
This bit is set when a bad block is detected.
Bit 6 (UNC)
This bit is set when an uncorrectable error is encountered.
Bit 5
This bit is â0â.
44/82
|
▷ |