SMCXXXAF Datasheet, PDF (22/82 Pages) Numonyx B.V – 32 Mbyte, 64 Mbyte, 128 Mbyte, 256 Mbyte and 512 Mbyte 3.3 V / 5 V supply CompactFlash™ card

Command interface
5
Command interface
SMCxxxAF
There are two types of bus cycles and timing sequences that occur in the PCMCIA type
interface, direct mapped I/O transfer and memory access. Table 16, Table 17, Table 18,
Table 19, Table 20, Table 21 and Table 22 show the read and write timing parameters.
Figure 2, Figure 3, Figure 4, Figure 5, Figure 6, Figure 7 and Figure 8 show the read and
write timing diagrams.
Note, the wait width time is intentionally less than the PCMCIA specification of 12 µs. Its
maximum value can be determined from the card information structure.
Figure 2. Attribute memory Read timing diagram
Address Inputs
–REG
–CE2/–CE1
ta(A)
tsu(A)
ta(CE)
ta(OE)
ten(CE)
tc(R)
VALID
tv(A)
tdis(CE)
–OE
D0 to D15 (D_OUT)
ten(OE)
VALID
tdis(OE)
AI10080
1. D_OUT signifies data provided by the CompactFlash memory card to the system. The -CE signal or both the -OE signal and
the -WE signal must be de-asserted between consecutive cycle operations.
Table 16. Attribute memory Read timing
Speed version
Symbol
tc(R)
ta(A)
ta(CE)
ta(OE)
tdis(CE)
tdis(OE)
ten(CE)
ten(OE)
tv(A)
tsu(A)
IEEE symbol
t_AVAV
t_AVQV
t_ELQV
t_GLQV
t_EHQZ
t_GHQZ
t_ELQNZ
t_GLQNZ
t_AXQX
t_AVGL
Parameter
Read Cycle time
Address Access time
CE Access time
OE Access time
Output Disable time from CE
Output Disable time from OE
Output Enable time from CE
Output Enable time from OE
Data Valid from Address Change
Address Setup time
300 ns
Min
Max
Unit
300
ns
300
ns
300
ns
150
ns
100
ns
100
ns
5
ns
5
ns
0
ns
30
ns
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