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SMCXXXAF Datasheet, PDF (42/82 Pages) Numonyx B.V – 32 Mbyte, 64 Mbyte, 128 Mbyte, 256 Mbyte and 512 Mbyte 3.3 V / 5 V supply CompactFlash™ card | |||
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Software interface
SMCxxxAF
7.4
I/O primary and secondary address configurations
(conf = 2,3)
When the system decodes the primary and secondary address configurations, the registers
are accessed in the block of I/O space as shown in Table 38.
As for the memory mapped addressing, register 0 is accessed with âCE1 Low and âCE2
Low (and A0 Donât care) as a word register on the combined odd and even data bus (D15 to
D0). This register may also be accessed with âCE1 Low and âCE2 High, by a pair of byte
accesses to offset 0. The address space of this word register overlaps the address space of
the error and feature bytewide registers at offset 1. When accessed twice as byte register
with âCE1 Low, the first byte is the even byte of the word and the second is the odd byte. A
byte access to register 0 with âCE1 High and âCE2 Low accesses the error (read) or feature
(write) register.
Table 38. Primary and secondary I/O decoding
âREG A9 to A4 A3 A2 A1 A0
âIORD=0
0
1F(17)h 0 0 0 0
Even Data register
0
1F(17)h 0 0 0 1
Error register
0
1F(17)h 0 0 1 0
Sector Count register
0
1F(17)h 0 0 1 1
Sector Number register
0
1F(17)h 0 1 0 0
Cylinder Low register
0
1F(17)h 0 1 0 1
Cylinder High register
0
1F(17)h 0 1 1 0
Select Card/Head register
0
1F(17)h 0 1 1 1
Status register
0
3F(37)h 0 1 1 0
Alternate Status register
0
3F(37)h 0 1 1 1
Drive Address register
âIOWR=0
Even Data register
Feature register
Sector Count register
Sector Number register
Cylinder Low register
Cylinder High register
Select Card/Head register
Command register
Device Control register
Reserved
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