SMCXXXAF Datasheet, PDF (28/82 Pages) Numonyx B.V – 32 Mbyte, 64 Mbyte, 128 Mbyte, 256 Mbyte and 512 Mbyte 3.3 V / 5 V supply CompactFlash™ card

Command interface
SMCxxxAF
The timing diagram for True IDE mode of operation in this section is drawn using the
conventions in the ATA-4 specification, which are different than the conventions used in the
PCMCIA specification and earlier versions of this specification. Signals are shown with their
asserted state as High regardless of whether the signal is actually negative or positive true.
Consequently, the -IORD, the -IOWR and the -IOCS16 signals are shown in the diagram
inverted from their electrical states on the bus.
Figure 8. True IDE mode I/O timing diagram
A0-A2, −CS0, −CS1⁽¹⁾
−IORD/−IOWR
Write Data D0-D15⁽²⁾
Read Data D0-D15⁽²⁾
−IOCS16⁽³⁾
t1
t7
t0
ADDRESS VALID
t2
t9
t8
t2i
VALID
t3
t4
VALID
t5
t6
t6z
1. The device addresses consists of −CS0, −CS1, and A2-A0.
2. The Data I/O consist of D15-D0 (16 bit) or D7-D0 (8 bit).
3. −IOCS16 is shown for PIO modes 0, 1 and 2. For other modes, this signal is ignored.
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