M58WR064HU Datasheet, PDF (17/114 Pages) Numonyx B.V – 64 Mbit (4Mb x16, Mux I/O, Multiple Bank, Burst) 1.8V supply Flash memories

M58WR064HU M58WR064HL
Bus operations
3.5
Standby
Standby disables most of the internal circuitry allowing a substantial reduction of the current
consumption. The memory is in stand-by when Chip Enable and Reset are at V_IH. The
power consumption is reduced to the stand-by level and the outputs are set to high
impedance, independently from the Output Enable or Write Enable inputs. If Chip Enable
switches to V_IH during a program or erase operation, the device enters Standby mode when
finished.
3.6
Reset/Power-Down
During reset mode the memory is deselected and the outputs are high impedance. The
memory is in reset mode when Reset/Power-Down is at V_IL. The power consumption is
reduced to the Standby level, or to the Reset/Power-Down level if the Power-Down function
is enabled, independently of the Chip Enable, Output Enable or Write Enable inputs. If
Reset/Power-Down is pulled to V_SS during a Program or Erase, this operation is aborted
and the memory content is no longer valid.
Table 3. Bus operations
Operation⁽¹⁾
E
G
W
L
RP WAIT⁽²⁾
Bus Read
V_IL
V_IL
V_IH
V_IH
V_IH
Bus Write
V_IL
V_IH
V_IL
V_IH
V_IH
Address Latch
V_IL
V_IH
x
V_IL
V_IH
Output Disable
V_IL
V_IH
V_IH
V_IH
V_IH
Standby
V_IH
x
x
x
V_IH
Hi-Z
Reset/Power-Down x
x
x
x
V_IL
Hi-Z
1. x = Don't care.
2. WAIT signal polarity is configured using the Set Configuration Register command.
ADQ15-ADQ0
Data Output
Data Input
Address Input
Hi-Z
Hi-Z
Hi-Z
17/114