PC87391 Datasheet, PDF (89/148 Pages) National Semiconductor (TI) – 100-Pin LPC SuperI/O Devices for Portable Applications

5.0 Game Port (GMP) (Continued)
5.3.3 Game Port Legacy Status Register (GMPLST)
This register is functional in all Game Port operation modes. Reading this register returns the status and the state of Device
A and B button and Axis pins, as defined in the table below. Writing to the offset of this register initiates a game device po-
sition reading process by forcing a low pulse to be driven on the axis pins in Legacy and Enhanced modes, and by initializing
all position counters in Enhanced mode.
Location: Offset 01h
Type:
RO
Bit
Name
Reset
7
6
5
4
3
2
1
0
Device B Device B Device A Device A Device B Device B Device A Device A
Button 1 Button 0 Button 1 Button 0 Y-Axis Pin X-Axis Pin Y-Axis Pin X-Axis Pin
Pin Status Pin Status Pin Status Pin Status Status
Status
Status
Status
X
X
X
X
X
X
X
X
Bit
Description
7 Device B Button 1 Pin Status. This bit directly reflects the status of Device B Button 1 input pin.
0: Low
1: High
6 Device B Button 0 Pin Status. This bit directly reflects the status of Device B Button 0 input pin.
0: Low
1: High
5 Device A Button 1 Pin Status. This bit directly reflects the status of Device A Button 1 input pin.
0: Low
1: High
4 Device A Button 0 Pin Status. This bit directly reflects the status of Device A Button 0 input pin.
0: Low
1: High
3 Device B Y-Axis Pin Status. This bit reflects the state of Device B Y-axis input pin.
0: JOYBY pin is driven low
1: JOYBY pin is released for charging
2 Device B X-Axis Pin Status. This bit reflects the state of Device B X-axis input pin.
0: JOYBX pin is driven lowr
1: JOYBX pin is released for charging
1 Device A Y-Axis Pin Status. This bit reflects the state of Device A Y-axis input pin.
0: JOYAY pin is driven low
1: JOYAY pin is released for charging
0 Device A X-Axis Pin Status. This bit reflects the status of Device A X-axis input pin.
0: JOYAX pin is driven low
1: JOYAX pin is released for charging
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