PC87391 Datasheet, PDF (42/148 Pages) National Semiconductor (TI) – 100-Pin LPC SuperI/O Devices for Portable Applications

2.0 Device Architecture and Configuration (Continued)
2.10.6 SuperI/O Configuration 5 Register (SIOCF5)
Location: Index 25h
Type:
Varies per bit
Bit
Name
Reset
7
PNF Status
1
6
5
Pin 35
Function
Select
0
0
4
SMI to IRQ2
Enable
0
3
Pin 34
Function
Select
0
2
PPM Power
Save Enable
0
1
0
Pin 71
Function
Select
0
0
Bit
Description
7 PNF Status. This bit describes the status of the PNF signal, which determines if Parallel Port of external FDD sig-
nals are selected by PPM mode. This is a RO bit.
0: Floppy Disk
1: Parallel Port (default)
6-5 Pin 35 Function Select. These are R/W bits.
Bits Function
65
0 0 PPM disabled (default)
0 1 PNF signal selected as active low (high selects printer, low selects floppy)
1 0 PNF signal selected as active high (low selects printer, high selects floppy)
1 1 XRDY signal selected
4 SMI to IRQ2 Enable. This is a R/W bit.
0: Disabled (default)
1: Enabled
3 Pin 34 Function Select. This is a R/W bit.
0: DRATE0 (default)
1: IRSL2
2 PPM Power Save Enable
0: Disabled (default).
1: When PPM is active and PNF is 0 (bit 7 of this register), the FDC output pins and the Parallel Port output
pins are masked when the corresponding drive is not used.
1-0 _{Pin 71 Function Select.}¹ _{This is a R/W bit.}
Bits Function
10
0 0 GPIO37 (default)
0 1 DR1
1 0 IRSL2
1 1 XIORD
1. In the PC87391, this pin is pulled up after reset by an internal pull-up resistor. Software should set this field as
appropriate to enable the required Legacy function.
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