PC87391 Datasheet, PDF (124/148 Pages) National Semiconductor (TI) – 100-Pin LPC SuperI/O Devices for Portable Applications

8.0 Legacy Functional Blocks (Continued)
8.2.3 Parallel Port Bitmap Summary
The Parallel Port functional block bitmaps are grouped according to first and second level offsets.
Table 35. Parallel Port Bitmap Summary for First Level Offset
Register
Bits
Offset Mnemonic
7
6
5
4
3
2
1
0
000h
DATAR
AFIFO
Data Bits
Address Bits
001h DSR
Printer
Status
ACK
Status
PE Status
SLCT
Status
ERR
Status
Reserved
EPP Time-
out Status
002h DCR
Reserved
Direction
Control
Interrupt
Enable
PP Input
Control
Printer Automatic
Initialization Line Feed
Control Control
Data
Strobe
Control
003h ADDR
EPP Device or Register Selection Address Bits
004h DATA0
EPP Device or R/W Data
005h DATA1
EPP Device or R/W Data
006h DATA2
EPP Device or R/W Data
007h DATA3
EPP Device or R/W Data
400h CFIFO
Data Bits
400h DFIFO
Data Bits
400h TFIFO
Data Bits
400h CNFGA
Reserved
Bit 7 of PP
Confg0
Reserved
401h
CNFGB
Reserved
Interrupt
Request
Value
Interrupt Select
Reserved DMA Channel Select
402h ECR
ECP Mode Control
ECP
Interrupt
Mask
ECP DMA
Enable
ECP
Interrupt
Service
FIFO Full
FIFO
Empty
403h
EIR
Reserved
Second Level Offset
404h EDR
Data Bits
405h
EAR
FIFO Tag
Reserved
www.national.com
124