LP3928 Datasheet, PDF (8/11 Pages) National Semiconductor (TI) – High Speed Bi-Directional Level Shifter and Ultra Low-Dropout CMOS Voltage Regulator

Note 16: This is the static current consumption from V_CCA for the part common to the channels.
Note 17: Only I_CCBTOTAL for DIR1=DIR2=DIR3=H and I_CCATOTAL for DIR1=DIR2=DIR3=L will be tested in production.
Calculation example: assuming DIR1=H, DIR2=L, DIR3=L, then the typical I_CCB current will be:
I_CCBTOTAL = I_BCOM + I_CHA→B + 2 * I_CHB→A = 450 µA + 530 µA + 2 * 2 µA = 984 µA
The typical I_CCA current is: I_CCATOTAL = I_A = 90 µA.
Note 18: This is the time it takes either to switch the level shifter on or off, or the time it takes to turn the latch by-pass on/off.
Note 19: This is the time it takes to switch the direction of the level shifter. After this time a signal can be applied on the new input. For the B→A direction, if EN2=1,
the latch set-up time has to be considered separately.
Note 20: The output voltage changes slightly with line voltage. An increase in the line voltage results in a slight increase in the output voltage and vice versa.
Note 21: The output voltage changes slightly with load current. An increase in the load current results in a slight decrease in the output voltage and vice versa.
Note 22: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its normal value. This specification does not apply
for input voltages below 2.7V.
Note 23: Turn-on time is that between the enable input just exceeding V_IH and the output voltage just reaching 95% of its nominal value.
Note 24: Range of capacitor values for which the device will remain stable. This electrical specification is guaranteed by design.
Note 25: Range of capacitor ESR values for which the device will remain stable. This electrical specification is guaranteed by design.
Note 26: The built-in thermal shut-down of the LDO is also used to put all Ai and Bi outputs in tristate mode.
Note 27: Additional information on lead temperature and pad temperature can be found in National Semiconductor Application Note (AN-1112).
Note 28: Unused inputs must be terminated.
Note 29: This electrical specification is guaranteed by design.
FIGURE 1. Output AC Line Regulation
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FIGURE 2. PSRR Input Perturbation
Typical Performance Characteristics Unless otherwise specified: C_VBAT = 1 µF, C_VCCA = 1 µF,
C_VCCB = 1 µF, V_BAT = 3.3V, V_CCA = 1.8V, T_A = 25˚C.
Level Shifter Propagation Delay A→B
Level Shifter Propagation Delay B→A
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