LP3928 Datasheet, PDF (7/11 Pages) National Semiconductor (TI) – High Speed Bi-Directional Level Shifter and Ultra Low-Dropout CMOS Voltage Regulator

Electrical Characteristics Unless otherwise specified: H = V_IH min, L = V_IL max, C_VBAT = 1 µF, I_OUT = 1 mA,
C_VCCB = 1 µF, C_VCCA = 1 µF. Typical values and limits appearing in standard typeface apply for T_J = 25˚C. Limits appearing in
boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Note 9) (Continued)
LDO Electrical Characteristics (Continued)
Unless otherwise specified: EN1 = L, EN2 = H; V_OUTnom = 2.85V, V_BAT = V_OUT(nom) + 0.5V.
Symbol
Parameter
Conditions
Typical
PSRR
I_Q
∆V_DO
I_SC
Power Supply Rejection Ratio
(Note 29)
Quiescent Current
Dropout Voltage (Note 22)
Short Circuit Current Limit
V_BAT = V_OUT(nom) + 1V,
40
f = 1 kHz, I_OUT = 50 mA, (Figure 2)
V_BAT = V_OUT(nom) + 1V,
20
f = 50 kHz, I_OUT = 50 mA, (Figure 2)
I_OUT = 1mA
85
I_OUT = 1 mA to 150 mA
130
I_OUT = 1 mA
0.4
I_OUT = 50 mA
20
I_OUT = 100 mA
45
I_OUT = 150 mA
60
V_BAT = 6V, Output Grounded (Steady 500
State)
I_OUT(PK) Peak Output Current
V_OUT ≥ V_OUT(nom) − 5%, V_BAT = 6V
460
T_ON
Turn-On Time (Note 23) (Note
200
29)
ρn (1/f) Output Noise Density
f = 1 kHz, C_OUT = 1 µF
0.6
e_n
Output Noise Voltage
BW = 10 Hz to 100 kHz, C_OUT = 1 µF
45
Output Output Filter Capacitance
V_BAT = 3.05V to 6V,
Capacitor (Note 24)
I_OUT = 1mA to 150 mA
Output Filter Capacitance ESR V_BAT = 3.05V to 6V,
(Note 25)
I_OUT = 1mA to 150 mA
Thermal Thermal Shutdown Temperature
160
Shutdown (Note 26)
Thermal Shutdown Hysteresis
20
Limit
Min Max
150
200
2
35
70
100
200
130
430
1
22
5
500
Units
dB
µA
mV
mA
mA
µs
µV/√Hz
µVrms
µF
mΩ
˚C
˚C
Note 3: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test condition, see Electrical
Characteristics tables.
Note 4: All voltages are with respect to the potential at the GND pin.
Note 5: The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula
P = (T_J − T_A)/θ_JA,
(1)
Where T_J is the junction temperature, T_A is the ambient temperature, and θ_JA is the junction-to-ambient thermal resistance. The 360 mW rating appearing under
Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150˚C, for T_J, 85˚C for T_A, and 180˚C/W for θ_JA. More power can
be dissipated safely at ambient temperatures below 85˚C. The thermal resistance can be better or worse than 180˚C/W depending on board layout. Larger copper
planes and thermal vias should be used to conduct heat away from the micro SMD solder bumps.
Note 6: The Human Body Model is 100 pF discharged through 1.5 kΩ resistor into each pin.
Note 7: V_CCB can be supplied from an external voltage source in the range of 1.65V to 3.6V, as long as both V_BAT and V_CCB are connected to the external source.
Only the LDO quiescent current (see DC electrical specifications) will add to the level-shifter current consumption. This Operating Rating does not imply guaranteed
performance. For guaranteed performance limits and associated test conditions, see Electrical Characteristics tables.
Note 8: Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 220 mW rating
appearing under Operating Ratings results from substituting the maximum junction temperature for operation, 125˚C, for T_J, 85˚C for T_A, and 180˚C/W for θ_JA into
(1) above. More power can be dissipated at ambient temperatures below 85˚C. The thermal resistance can be better or worse than 180˚C/W depending on board
layout. Larger copper planes and thermal vias should be used to conduct heat away from the micro SMD solder bumps.
Note 9: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with T_J = 25˚C or correlated using
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
Note 10: The target output voltage, which is labeled V_OUT(target), is the desired or ideal output voltage. The nominal output voltage, which is labeled V_OUT(nom), is
the output voltage measured with the input 0.5V above V_OUT(target) and a 1 mA load.
Note 11: Input leakage current for pins DIRi, EN1, EN2.
Note 12: Input leakage current for pins Bi, LatchClk.
Note 13: This is the static current consumption from V_CCB for channel (i) when DIRi=H (A→B direction).
Note 14: This is the static current consumption from V_CCB for channel (i) when DIRi=L (B→A direction).
Note 15: This is the static current consumption from V_CCB for the part common to the channels.
7
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