LP2995 Datasheet, PDF(7/13 Page) National Semiconductor (TI)

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LP2995 Datasheet, PDF (7/13 Pages) National Semiconductor (TI) – DDR Termination Regulator

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Pin Descriptions

AVIN AND PVIN

AVIN and PVIN are the input supply pins for the LP2995.

AVIN is used to supply all the internal control circuitry for the

two op-amps and the output stage of VREF. PVIN is used

exclusively to provide the rail voltage for the output stage on

the power operational amplifier used to create VTT. For

SSTL-2 applications AVIN and PVIN pins should be con-

nected directly and tied to the 2.5V rail for optimal perfor-

mance. This eliminates the need for bypassing the two sup-

ply pins separately.

VDDQ

VDDQ is the input that is used to create the internal refer-

ence voltage for regulating VTT and VREF. This voltage is

generated by two internal 50kâ¦ resistors. This guarantees

that VTT and VREF will track VDDQ / 2 precisely. The optimal

implementation of VDDQ is as a remote sense for the refer-

ence input. This can be achieved by connecting VDDQ

directly to the 2.5V rail at the DIMM. This ensures that the

reference voltage tracks the DDR memory rails precisely

without a large voltage drop from the power lines. For

SSTL-2 applications VDDQ will be a 2.5V signal, which will

create a 1.25V reference voltage on VREF and a 1.25V

termination voltage at VTT. For SSTL-3 applications it may

be desirable to have a different scaling factor for creating the

internal reference voltage besides 0.5. For instance a typical

value that is commonly used is to have the reference voltage

equal VDDQ*0.45. This can be achieved by placing a resis-

tor in series with the VDDQ pin to effectively change the

resistor divider.

VSENSE

The purpose of the sense pin is to provide improved remote

load regulation. In most motherboard applications the termi-

nation resistors will connect to VTT in a long plane. If the

output voltage was regulated only at the output of the

LP2995, then the long trace will cause a significant IR drop,

resulting in a termination voltage lower at one end of the bus

than the other. The VSENSE pin can be used to improve this

performance, by connecting it to the middle of the bus. This

will provide a better distribution across the entire termination

bus.

Note: If remote load regulation is not used, then the VSENSE pin must still be

connected to VTT.

VREF

VREF provides the buffered output of the internal reference

voltage VDDQ / 2. This output should be used to provide the

reference voltage for the Northbridge chipset and memory.

Since these inputs are typically an extremely high imped-

ance, there should be little current drawn from VREF. For

improved performance, an output bypass capacitor can be

used, located close to the pin, to help with noise. A ceramic

capacitor in the range of 0.1 ÂµF to 0.01 ÂµF is recommended.

VTT

VTT is the regulated output that is used to terminate the bus

resistors. It is capable of sinking and sourcing current while

regulating the output precisely to VDDQ / 2. The LP2995 is

designed to handle peak transient currents of up to Â± 3A with

a fast transient response. The maximum continuous current

is a function of VIN and can be viewed in the TYPICAL

PERFORMANCE CHARACTERISTICS section. If a tran-

sient is expected to last above the maximum continuous

current rating for a significant amount of time then the output

capacitor should be sized large enough to prevent an exces-

sive voltage drop. Despite the fact that the LP2995 is de-

signed to handle large transient output currents it is not

capable of handling these for long durations, under all con-

ditions. The reason for this is the standard packages are not

able to thermally dissipate the heat as a result of the internal

power loss. If large currents are required for longer dura-

tions, then care should be taken to ensure that the maximum

junction temperature is not exceeded. Proper thermal derat-

ing should always be used (please refer to the Thermal

Dissipation section).

Component Selection

INPUT CAPACITOR

The LP2995 does not require a capacitor for input stability,

but it is recommended for improved performance during

large load transients to prevent the input rail from dropping.

The input capacitor should be located as close as possible to

the PVIN pin. Several recommendations exist dependent on

the application required. A typical value recommended for AL

electrolytic capacitors is 50 ÂµF. Ceramic capacitors can also

be used, a value in the range of 10 ÂµF with X5R or better

would be an ideal choice. The input capacitance can be

reduced if the LP2995 is placed close to the bulk capaci-

tance from the output of the 2.5V DC-DC converter.

OUTPUT CAPACITOr

The LP2995 has been designed to be insensitive of output

capacitor size or ESR (Equivalent Series Resistance). This

allows the flexibility to use any capacitor desired. The choice

for output capacitor will be determined solely on the applica-

tion and the requirements for load transient response of VTT.

As a general recommendation the output capacitor should

be sized above 100 ÂµF with a low ESR for SSTL applications

with DDR-SDRAM. The value of ESR should be determined

by the maximum current spikes expected and the extent at

which the output voltage is allowed to droop. Several capaci-

tor options are available on the market and a few of these

are highlighted below:

AL - It should be noted that many aluminum electrolytics only

specify impedance at a frequency of 120 Hz, which indicates

they have poor high frequency performance. Only aluminum

electrolytics that have an impedance specified at a higher

frequency (between 20 kHz and 100 kHz) should be used for

the LP2995. To improve the ESR several AL electrolytics can

be combined in parallel for an overall reduction. An important

note to be aware of is the extent at which the ESR will

change over temperature. Aluminum electrolytic capacitors

can have their ESR rapidly increase at cold temperatures.

Ceramic - Ceramic capacitors typically have a low capaci-

tance, in the range of 10 to 100 ÂµF range, but they have

excellent AC performance for bypassing noise because of

very low ESR (typically less than 10 mâ¦). However, some

dielectric types do not have good capacitance characteris-

tics as a function of voltage and temperature. Because of the

typically low value of capacitance it is recommended to use

ceramic capacitors in parallel with another capacitor such as

an aluminum electrolytic. A dielectric of X5R or better is

recommended for all ceramic capacitors.

Hybrid - Several hybrid capacitors such as OS-CON and SP

are available from several manufacturers. These offer a

large capacitance while maintaining a low ESR. These are

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