LMH0341_09 Datasheet, PDF (7/28 Pages) National Semiconductor (TI) – 3 Gbps, HD, SD, DVB-ASI SDI Deserializer with Loopthrough and LVDS Interface

LVDS Output Electrical Characteristics
Over supply and Operating Temperature ranges unless otherwise specified. (Note 2)
Symbol
V_OD
ΔV_OD
V_OS
ΔV_OS
I_OS
Parameter
Differential Output Voltage
Change in V_OD between
complementary output states
Offset Voltage
Change in V_OS between
complementary output states
Output Short Circuit Current
Condition
R_L = 100Ω
V_OUT = 0V, R_L = 100Ω
Min
230
1.125
—50
LVDS Switching Characteristics
Over supply and Operating Temperature ranges unless otherwise specified. (Note 2)
Symbol
Parameter
Condition
Min
t_ROTR
t_ROTF
t_ROCP
LVDS Low to High Transition time
LVDS High to Low Transition time
Receiver output clock period
See LVDS Switching times
RxCLKOUT is DDR. If divide by
4 is enabled, the output clock
period will be doubled
t_RODC
t_ROCH
t_ROCL
t_RBIT
t_DVBC
t_DVAC
t_ROJR
RxCLKOUT Duty Cycle
RxCLKOUT high time
RxCLKOUT low time
See Receiver timing
specifications
Receiver output bit width
RX data transition to RXCLK transition See Receiver timing
RXCLK transition to RX data transition ^{specifications(Note 8)}
Receiver output Random Jitter
Receiver output intrinsic
random jitter.
45
1.51
1.51
650
650
Bit error rate ≤ 10^-15. Alternating
10 pattern. RMS(Note 7)
t_ROJT
t_RD
Peak-to-Peak Receiver Output Jitter
Receiver Propagation Delay
(Note 7)
See Receiver (LVDS Interface)
Propagation Delay
t_RLA
Receiver Link Acquisition Time
From device reset or change in
input data rate to locked
condition
t_LVSK
LVDS Output Skew
LVDS Differential Output Skew
between + and − pins
Typ
1.25
Typ
300
300
2T
50
T
2.5
70
12 T
20
Max
310
35
1.375
35
Units
mV
mV
V
mV
mA
Max
Units
ps
ps
ns
55
%
ns
ns
ns
ps
ps
ps
125
ps
24
ms
ps
7
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