LMH0341_09 Datasheet, PDF (17/28 Pages) National Semiconductor (TI) – 3 Gbps, HD, SD, DVB-ASI SDI Deserializer with Loopthrough and LVDS Interface

SMPTE standards require. The output voltage amplitude of
the cable driver is set by the R_SET resistor. For single-ended
applications, an 7.87kΩ resistor is connected between this pin
and ground to set the swing to 800mV.
The PLL loop filter is external for the SER. A capacitor is con-
nected between the LF_CP and LF_REF pins. Typical value
is 30 nF.
There are several configuration pins that requiring setting to
the proper level. The RSVD_H pins should be pulled High to
the 3.3V rail with a 5 kΩ resistor. Depending upon the appli-
cation the DVB_ASI pin may be tied off or driven.
There are three supply connections (see By Pass discussion
and also Pin Descriptions for recommendations). The two
main supplies are the 3.3V rail and the 2.5V rail. There is also
a 3.3V connection for the PLL circuitry.
There are multiple Ground connections for the device. The
main ground connection for the SER is through the large cen-
ter DAP pad. This must be connected to ground for proper
device operation. In addition, multiple other inputs are re-
quired to be connected to ground as show in the figure and
listed in the Pin Description table.
FIGURE 15. Typical SMPTE Application Circuit
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