LMH0030_0608 Datasheet, PDF (7/29 Pages) National Semiconductor (TI) – SMPTE 292M/259M Digital Video Serializer with Video and Ancillary Data FIFOs and Integrated Cable Driver

AC Electrical Characteristics (Continued)
Note 8: Average value measured between rising edges computed over at least one video field.
Note 9: Intrinsic timing jitter is measured in accordance with SMPTE RP 184-1996, SMPTE RP 192-1996 and the applicable serial data transmission standard,
SMPTE 259M-1997 or SMPTE 292M-1998. A color bar test pattern is used. The value of f_SCLK is 270 MHz or 360 MHz for SMPTE 259M, 540MHz for SMPTE 344M,
or 1485 MHz for SMPTE 292M serial data rates. See Timing Jitter Bandpass section.
Note 10: Intrinsic jitter is defined in accordance with SMPTE RP 184-1996 as: jitter at an equipment output in the absence of input jitter. As applied to this device,
the input port is V_CLK and the output port is SDO or SDO.
Note 11: Specification is guaranteed by characterization.
Test Loads
20180304
Timing Jitter Bandpass
20180306
7
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