PC87382 Datasheet, PDF (69/72 Pages) National Semiconductor (TI) – LPC-to-LPC Switch for Docking Stations, with Fast Infrared Port, Serial Port and GPIOs

8.0 Device Characteristics (Continued)
8.4.8 MIR and FIR Timing
Symbol
Parameter
Conditions
Min¹
Max¹
Unit
t_MPW
M_DRT
t_MJT
t_FPW
MIR Signal Pulse Width
Transmitter
Receiver
MIR Transmitter Data Rate Tolerance
MIR Receiver Edge Jitter, % of Nominal Bit Duration
FIR Signal Pulse Width
Transmitter
Receiver
t_MWN − 25 ²
60
120
90
t_MWN + 25
± 0.1%
± 2.9%
130
160
nsec
nsec
nsec
nsec
t_FDPW FIR Signal Double Pulse Width
Transmitter
Receiver
245
255
nsec
215
285
nsec
F_DRT
FIR Transmitter Data Rate Tolerance
± 0.01%
t_FJT
FIR Receiver Edge Jitter, % of Nominal Bit Duration
± 4.0%
1. Not tested. Guaranteed by design.
2. t_MWN is the nominal pulse width for MIR mode. It is determined by the M_PWID field (bits 4-0) in the MIR_PW
register at offset 01h in bank 6.
t_MPW
MIR
t_FPW
Data
Symbol
t_FDPW
FIR
Chips
Figure 17. MIR and FIR Timing
Revision 1.2
69
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